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In this paper, a 10-b 500MS/s A/D converter (ADC) with a hybrid calibration and a new error correction logic is discussed. The proposed ADC employs a single-channel cascaded folding-interpolating architecture whose folding rate (FR) is 25 and interpolation rate (IR) is 8. In order to overcome the disadvantage of offset error, at the open-loop amplifier, a hybrid self-calibration circuit is proposed...