The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
An instrument for on-chip measurement of transceiver transmission capability is described that is fully realizable in CMOS technology and embeddable within an SoCs. The instrument can be used to inject and extract the timing and voltage information associated with signals in high-speed transceiver circuits that are commonly found in data communication applications. At the core of this work is the...
In this paper we present a design and implementation of an instrument that can be used to inject and extract the timing information associated with signals in high-speed transceiver circuits used for data communications. Using statistical methods, the probability distributions associated with these signals can be extracted using some digital logic and various low-pass filter circuits. At the core...
This paper presents a pole-zero placement approach for designing arbitrary-order time-mode filters for anti-imaging (reconstruction) applications. One application is for phase-domain sigma-delta modulation involving digital-to-time converters. The time-mode filters are constructed from an th-order type-II PLL single-loop feedback structure involving an active loop filter of order . The tradeoffs...
In this paper we present an implementation and performance investigation of a phase signal generator for use in mixed-signal embedded test. The generator consists of a circular 1×N-bit memory and a time-mode filter. The memory is loaded with a phase-modulated sigma-delta encoded bit stream generated in software. Due to its digital nature, the generator except for the time-mode filter is fully synthesizable...
This article presents techniques and circuits for jitter generation and measurement. The proposed implementations use periodic bit-streams and high-order PLLs to generate the desired phase signal. Here, an arbitrary signal is first encoded using sigma-delta modulation in the digital amplitude-domain and converted to the phase-domain through a digital-to-time converter (DTC) process realized in software...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.