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Classical requirements validation methods usually work with static behavioral models, and under the assumption that there are no dependencies and interactions between the requirements. Requirements verification is mostly done by statically analyzing the design artifacts and by running tests. This work presents a practical formal approach for requirements validation and verification (V&V) of dependable...
In this paper, we present our vision for moving toward an ideal state of cloud computing-a cloud Nirvana. In a cloud Nirvana, boundaries, both physically and artificially created by various types of constraints, imposed on the users would be removed. We propose a three-stage plan toward achieving a cloud computing Nirvana. The three stages are named Migration, Integration, and Unification. Each stage...
The promise of formal verification of system-of-systems is in harnessing the power and accuracy of modern day computers to create trust-worthy systems. The success of formal verification techniques depends, to large degree, on the existence of a sound and complete collection of formally written requirements. To date, there is no known methodology for assuring that a collection of requirements, formal...
This paper addresses the need for formal specification and high-level verification of requirements of complex reactive system of systems. It describes a technique and the associated TLtoSQL tool-set that consists of four plugins for the popular Eclipse environment: (i) a database tool that records JUnit tests in an JDBC compliant database, (ii) a graphical editor for propositional linear-time temporal...
In this paper we present a new approach for developing libraries of temporal formal specifications. Our approach is novel in its use of UML statechart-based assertions for formal specifications and its emphasis on validation testing, including an emphasis on the inclusion of validation test scenarios as an integral part of a formal specification library. Validation test scenarios are needed to ensure...
This paper addresses the need for rapid and robust integration of external statechart assertions with the software components of a system of systems (SoSes) for the purpose of runtime verification of the complex SoS behaviors. We describe a framework for connecting assertions to statechart models or to plain Java code using AspectJ. The framework manages connections using a single reusable AspectJ...
Formal verification of system-of-systems uses computer-based techniques to assure that the behavior of a subject system of systems complies with its formal correctness specifications. Such formal specifications are often created on the basis of natural-language (NL) requirement specifications. While NL documents such as marketing requirement documents and concept-of-operation (CONOPS) documents contain...
Numerous techniques exist for conducting computer-assisted formal verification and validation. The cost associated with these techniques varies, depending on factors such as ease of use, the effort required to construct correct requirement specifications for complex real-world properties, and the effort associated with instrumentation of the software under test. Likewise, existing techniques differ...
This paper addresses the need for formal specification and runtime verification of system-level requirements of distributed reactive systems. It describes a formalism for specifying global system behaviors in terms of message sequence chart assertions and a technique for the evaluation of the likelihood of success of a distributed protocol under non-trivial communication conditions via discrete event...
The paper concerns the quality assurance of the timing properties of complex, real-time, reactive system-of-systems. It builds upon our previous work on run-time model checking of timing properties and the automatic white-box testing based on run-time assertion checking, and brings together several technologies to improve the predictability of the system-of-systems' logical and timing behavior. The...
This paper addresses the need to integrate formal assertions into the modeling, implementation, and testing of statechart based designs. The paper describes an iterative process for the development and verification of statechart prototype models augmented with statechart assertions using the StateRover tool. The novel aspects of the proposed process include (1) writing formal specifications using...
This paper describes a model checking technique and tool for UML statecharts based on automatic white box test-generation combined with automatic run-time monitoring of statechart assertions. The white box test generator is an automatically generated JUnit TestCase, which generates sequences of events, conditions, and input data for the system under test (SUT). It generates test sequences while observing...
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