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The quantitative performance indicators of Physical Unclonable Functions (PUFs)-Randomness, Steadiness, Correctness, Diffuseness and Uniqueness-are strictly defined and applied to the evaluation of 45 arbiter PUFs on Virtex-5 FPGAs. The indicators effectively reflect the characteristics of PUFs ranging from 0 to 1 with 1 being the highest performance. The indicators enable the easy measurement and...
An experimental FPGA board SASEBO-GII has been developed as a standard platform for advanced research on side-channel attacks and countermeasures. The board is equipped with a new FPGA device, Virtex-5 LX30/50, which provides large logic capacity and dynamic partial reconfiguration. Configuration data can be transferred from a host PC to the FPGA through a USB interface without using a JTAG cable...
An enhanced CPA (correlation power analysis) attack which screens key candidates using correlation levels and ranking is proposed in this paper. An AES circuis is implemented on a Xilinxreg FPGA on SASEBO (side-channel attack standard evaluation board) specifically designed for side-channel attack experiments, and the proposed attack is performed and compared to the standard CPA. As a result, the...
This paper proposes a method of generating a lightweight scalable NFA-based string matching circuit with elimination of redundant resources. String matching circuits have been studied extensively for intrusion detection systems. An NFA-based string matching circuit, one of the works, has expandability of the processing data width. Due to the huge hardware requirement, it was difficult to implement...
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