The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Implemented fractional-N frequency synthesizer architecture based upon Pulse Width Locked Loop technique eliminates the need for ???? modulator within the loop while preserving the frequency resolution and accuracy of such synthesizers. Eliminating the modulator allows the designer to optimize the synthesizer loop bandwidth without any constraint imposed by the modulator. The loop operates by locking...
A new high-voltage bootstrapped sampling switch with input signal range exceeding 11 times its supply voltage is presented. Proposed switch occupies a silicon area of 250 mum by 160 mum in 0.35 mum twin-well CMOS process with drain extended NMOS (DNMOS) capability. The switch safe input signal range is restricted only by the DNMOS drain terminal breakdown voltage, i.e. 50 V . Implemented switch can...
A low-power, low-voltage, single-ended input, four-quadrant CMOS analog multiplier architecture suitable for analog neural network implementations is presented. The architecture takes advantage of the quadratic I-V characteristic of an NMOS and a PMOS transistors both operating in saturation region. Combining NMOS and PMOS transistors allows four-quadrant operation with single-ended input. Due to...
This paper presents design and simulation of two temperature compensated LC Colpitts reference oscillator. First uses an on-chip differential inductor while the other one uses bondwire inductor. Technology is 0.35 mum 2P/4M CMOS technology with high resistivity poly and thick metal option. Oscillator with on-chip differential inductor consumes 7.5 mA from 2.5 V supply and absolute peak frequency deviation...
An effective nonlinear behavioral model of a bipolar track-and-hold amplifier (THA) is described. The model is aimed for system level simulations and provides accurate and fast simulation. The model is written with AHDL. Basic THA properties together with noise and nonlinearity features are modeled with a simulation time improvement, for high accuracy setup, up to 7 times of the transistor level....
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.