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This paper presents the design of an ASIC for the task of multi-speaker phoneme recognition in continuous speech environments. The phoneme recogniser is based on DWTs for feature extraction and the One-against-one SVM method, along a priorities scheme, for classification. The ASIC design was fabricated on an AMS 0.35µ CMOS C35B4C3 chip. The final ASIC design resulted into a chip size equal to 43.35mm...
This paper presents the design of a digital hardware implementation based on Discrete Wavelet Transforms (DWTs) for the task of feature extraction in a multi-speaker phoneme recognition system. This is the first research where the design of a hardware-based DWT design is directed towards a speech recognition application. In the proposed architecture, the lifting-scheme approach employing the orthogonal...
A phoneme recognition system based on Discrete Wavelet Transforms (DWT) and Support Vector Machines (SVMs), is designed for multi-speaker continuous speech environments. Phonemes are divided into frames, and the DWTs are adopted, to obtain fixed dimensional feature vectors. For the multiclass SVM, the One-against-one method with the RBF kernel was implemented. To further improve the accuracies obtained,...
This paper presents the design of a digital hardware implementation based on Support Vector Machines (SVMs), for the task of multi-speaker phoneme recognition. The One-against-one multiclass SVM method, with the Radial Basis Function (RBF) kernel was considered. Furthermore, a priority scheme was also included in the architecture, in order to forecast the three most likely phonemes. The designed system...
This paper proposes a hardware solution to the problem of autonomous parking of a car-like robot. The proposed system scans for a valid parking space and performs the necessary manoeuvres to park the robot within that space. Parallel and perpendicular parking is achieved by using a fuzzy logic based system that was developed in a simulation environment and subsequently prototyped on a custom built,...
Four multiclass Support Vector Machines (SVMs) methods were designed for the task of speaker independent phoneme recognition. These are the All-at-once, One-against-all, One-against-one, and the Directed Acyclic Graph SVM (DAGSVM). The Discrete Wavelet Transform (DWT) 8 frequency band power percentages are used for feature extraction. All tests were carried out on the TIMIT database. Comparable recognition...
A phoneme recognition system based on Discrete Wavelet Transforms (DWTs) and Support Vector Machines (SVMs), is designed for speaker-independent continuous speech environments. This research studies the pitch variation present in a speech signal, due to gender difference, and whether an increase is obtained if male and female speakers are considered separately. The results obtained show, that the...
A speaker independent phoneme recognition system, based on Support Vector Machines (SVMs) method was improved by adding a priority scheme to forecast the three most likely phonemes. The system helps improve the obtained recognitions rate. For the phoneme recognition system, four multiclass SVMs methods, the All-at-once, One-against-all, One-against-one, and the Directed Acyclic Graph SVM (DAGSVM),...
Two different neural network architectures were designed for speaker independent phoneme recognition systems. The first architecture consists of the Radial Basis Function (RBF), while in the second architecture a Self-Organising Maps (SOM) neural network replaces the RBF. The Discrete Wavelet Transform (DWT) is used for feature extraction in both systems. Both systems were tested on the TIMIT database...
This paper presents the hardware implementation and verification of an FPGA-based DMX512 decoder using VHDL as a Hardware Description Language. The implementation is proposed to provide a single chip solution to decode the DMX512 serial data generated from a control desk, whilst providing control data and processing mechanisms on the same chip. In particular, such an FPGA solution would be superior...
In the last decades, Global Positioning System (GPS) receivers have become more popular and are now incorporated in mobile phone electronics and also in navigation systems, namely in automotive, marine and aerospace equipment. This paper presents the design of various digital signal processing (DSP) and communication blocks which form an integral part of a typical L1-band Coarse/Acquisition (C/A)-code...
This paper presents the measured results and characterisation of a 1.2 V CMOS low phase noise quadrature output phase locked loop (PLL) with an on-chip regulated DC-DC converter. In particular, it exhibits a phase noise response of less than -115 dBc/Hz at an offset of 1 MHz from the carrier and has a tuning range of over 38%. The automatic amplitude control loop in the VCO gives the facility to trade-off...
In this paper a digital hardware implementation of the Self-Organising Maps (SOMs) for the application of handwritten digit recognition is presented. Two methods were implemented: Euclidean and Manhattan method. The highest recognition rate for both methods was calculated through three testing techniques. The highest recognition rates obtained are 71.267% and 63.667% for the Euclidean and the Manhattan...
This paper presents a novel concept of using a phase-interpolation direct digital synthesizer for an Ultra Wideband MB-OFDM Alliance application as a low silicon area alternative to state of the art solutions. In particular, an investigation of the spurious tones in such direct digital synthesizer is presented and ways how to reduce their presence are discussed. The design and simulation of the critical...
This paper presents the concept of using a MEMS piezoelectric actuated tunable inductor in the design of a wideband high performance VCO. Furthermore, a model of the tunable inductor is presented to facilitate the VCO design and simulation. In addition, by means of this model important characteristics of the tunable inductor can be derived enabling a design of the VCO to be superior in phase noise...
This paper presents a comparative study on the difference in the performance of a differential negative resistance LC-VCO when CMOS and bipolar transistors are used in its implementation. Both the noise magnitude of these transistors and the noise up-conversion mechanisms are used to identify the best selection of devices in designing a low phase noise LC-VCO. This study was performed using the IHP...
This paper presents the design of a low phase noise 1.6 GHz CMOS buffered quadrature output VCO with automatic amplitude control. It is operated with a supply voltage of 1.2 V and dissipates a current of less than 10 mA. It is capable of delivering quadrature locked signals with almost constant amplitude in the range from 1.22 GHz to 1.95 GHz with a phase noise response of less than -115 dBc at an...
This paper presents the design of a 1.6 GHz quadrature phase locked loop for GPS applications, operated with a supply voltage of 1.2 V and dissipating a current of less than 5 mA. It is capable of delivering quadrature locked signals in the range from 1.22 GHz to 1.96 GHz with a phase noise response of less than 115 dBc at an offset of 1 MHz from the carrier. The wide tuning range is obtained using...
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