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This paper highlights a 14nm Analog and RF technology based on a logic FinFET platform for the first time. An optimized RF device layout shows excellent Ft/Fmax of (314GHz/180GHz) and (285GHz/140GHz) for NFET and PFET respectively. A higher PFET RF performance compared to 28nm technology is due to a source/drain stressor mobility improvement. A benefit of better FinFET channel electrostatics can be...
Accurate extraction of the SPICE model parameter is critical in the CMOS IC design. However, it faces difficult issues in state-of-the-art MOSFET technology. First, the gate CV parameter extraction is challenging due to small values and many extrinsic components that need to be de-embedded. Second, the systematic offset of the gate critical dimension (CD) exists between test structures and circuits,...
This letter evaluates a radio-frequency (RF) method to extract the gate capacitance for SOI MOSFETs with ultrathin ultraleaky gate dielectrics. Conventional methods such as two-element and three-element methods using precision impedance analyzer were also compared. The RF method scans the RF capacitance data, assesses its lower and upper limits, and extracts the SOI gate capacitance accurately independent...
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