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A monolithic power amplifier (PA) operating in the 60 GHz band is presented. The circuit has been designed utilizing an advanced 0.25 SiGe-heterojunction bipolar transistor (HBT) technology, featuring npn transistors with and . A two-stage cascode architecture has been chosen for the implementation. Design techniques and optimization procedure are explained in detail. Measurements show a small signal...
In this work we report on the importance of electromagnetic analysis for the layout design of monolithic 60 GHz power amplifiers (PA) in SiGe HBT technology. To facilitate this, two different layouts of the same circuit architecture were investigated. The circuits were originally designed using the circuit simulator of Agilentpsilas ADStrade and realized in a high performance 0.25 mum SiGe BiCMOS...
A 60 GHz monolithic upconversion mixer using a 0.25 mum SiGe-HBT technology with fT and fmaxap200 GHz is demonstrated in this work. The mixer is based on the Gilbert micromixer principle. It has broadband matched single-ended IF and LO inputs. An active LO balun is implemented on-chip to convert the single-ended LO signal into a differential one for driving the Gilbert cell. A shorted stub is inserted...
This work presents the design and optimization strategies of a 60 GHz monolithic power amplifier. The circuit has been implemented utilizing an advanced 0.25 mum SiGe-HBT technology, featuring npn transistors with ftau and fmax = 200 GHz. The technique used to achieve a minimum difference between the output power under 1 dB compression and saturated output power is explained. Following this, the analysis...
A monolithic low-noise-amplifier operating in the 60 GHz band is presented. The circuit has been designed utilizing an advanced 0.25 mum SiGe BiCMOS technology, featuring npn transistors with fT and fmax ap 200 GHz. A two stage cascode architecture has been chosen for the implementation. Design techniques and optimization procedure are explained in detail. Measurements show a gain of 18 dB at 61 GHz,...
This work presents an active downconverter targeted for integration in 60 GHz high speed data communication RF front-ends. The designed downconverter has been realized in 0.25 mum SiGe BiCMOS technology with ft around 200 GHz. The downconverter consists of a single balanced mixer with an on-chip balun for differential to single ended conversion. High linearity and bandwidth are the main design goals...
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