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The significance of controlling threshold voltage using nitrogen molecule ion (N2+) implantation into a silicon substrate was demonstrated for an n-channel MOS with a nickel fully silicided gate electrode and a high-k gate dielectric. We have clarified the idea that a small part of the implanted nitrogen was activated and acted as a counter dope for a channel by secondary ion mass spectrometry analysis,...
High performance LSTP CMISFETs with poly-Si/TiN hybrid gate and high-k dielectric have been studied. Gate depletion is successfully suppressed by in-situ phosphorus doped poly-Si gate for NMIS and by TiN metal gate for PMIS. Vth control for pMIS is accomplished by fluorine implantation into substrate. Optimization of HfSiON formation and TiN removal process is the key to achieve high-reliability....
EOT reduction is a key challenge to keep the Moore's law, especially in low power LSIs. Nice candidates of gate dielectric as alternative to conventional SiO2 are N-rich SiON and high-K. However, in each case, we truly need tuning tools of Vth in the system LSI applications. F incorporation technique should be effective in Vth tuning with both N-rich SiON and high-K. Moreover, F incorporation is promising...
A simple high-k/poly-Si dual-gate CMIS platform with a novel method to control threshold voltage (Vth) has been proposed for 45nm node. The PMIS Vth control method is a simple selective fluorine-implantation to channel region with optimizing extension and pocket implantation. We have also demonstrated the transistor variability improvement with our HfSiON/poly-Si platform, compared to SiON/poly-Si...
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