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This study presents a novel CMOS-MEMS 3-axis accelerometer design using TSMC 0.18µm 1P6M CMOS process. Thus, the footprint size of 3-axis accelerometer is significantly reduced to 400×400µm2 by the single proof-mass design, Due to the novel fully-differential gap-closing sensing electrode design in all three sensing directions, the sensitivities of 3-axis accelerometer are improved. Moreover, by means...
A transparent resistive random access memory (T-RRAM) based on ITO/Gd2O3/ITO capacitor structure is successfully fabricated on glass substrate by pulse laser deposition (PLD) at room temperature. Under bipolar operation, the ITO/Gd2O3/ITO device exhibits reliable and stable resistive switching behaviors for more than 200 switching cycles and low operation voltage of -2V/+2V. Furthermore, our device...
The effect of flatband-voltage reduction [roll-off (R-O)], which limits fabrication options for obtaining the needed band-edge threshold voltage values in transistors with highly scaled metal/high- k dielectric gate stacks, is discussed. The proposed mechanism causing this R-O phenomenon is suggested to be associated with the generation of positively charged oxygen vacancies in the interfacial SiO...
Issues associated with the integration of p-type band-edge (5.0~5.2 eV) effective work function (EWF) electrodes are identified and discussed. The Fermi-level (Ef) pinning effect traditionally used to explain the lowering of p-MOS EWF is believed not to be an intrinsic limitation. However, a new described as the "flatband (Vfb,) rolloff effect" is shown to be the dominant factor.
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