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The paper presents a concept of the vehicle/road infrastructure in vehicle-to-infrastructure (V2I) communication for tagging and informing vehicles about the surrounded environment. A frame analysis and the influence of the data packet size on Ultra-wideband (UWB) were investigated. The authors have determined the distance that could be traveled by a vehicle at the given speed in relation to the amount...
This paper presents the comparison of filtering methods – median filtration, moving average Kalman filtration and filtration based on a distance difference to determine the most accurate arm length for circular motion, as a model of wind turbine propellers movement. The experiments have been performed with the UWB technology system containing four anchors and a tag attached to 90 cm arm that was rotated...
In this paper, the application of the Artificial Neural Network (ANN) algorithm has been used for testing selected specification parameters of voltage-controlled oscillator. Today, mixed electronic circuits specification time is an issue. An analog part of Phase Locked Loop is a voltage-controlled oscillator, which is very sensitive to variation of the technology process. Fault model for the integrated...
This paper presents comparison of prototype location system built with standard components of 2.4 and 5 GHz WLAN network infrastructure. The system can be used for personal or other objects’ positioning, both for indoor and outdoor environments. The system is local, i.e. its operational area is limited to WLAN network operating range. The system is based on standard and widely available WLAN components...
An evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such...
The paper presents a methodology for parametric fault clustering in analog electronic circuits with the use of a self-organizing artificial neural network. The method proposed here allows fast and efficient circuit diagnosis on the basis of time and/or frequency response which may lead to higher production yield. A self-organizing map (SOM) has been applied in order to cluster all circuit states into...
This paper is focused on the diagnosis of analog and mixed electronic circuit in frequency domain. A multi tone signal excites a circuit under test in order to detect and locate a single fault. The input signal consists of a number of frequencies which are selected by Principal Component Analysis (PCA) algorithm. An exemplary circuit has been examined and results have been discussed.
There is a method of global parametric faults location in analogue integrated circuits presented in this paper. Circuit Under Test is diagnosed in the time domain. The method is based on a utilisation of the tested device response and its derivative base features, i.e. following maxima and minima. The set consisted of base features is transformed into an advanced feature. Base features and the advanced...
This paper describes new method of fault diagnosis in analog electronic circuits (AEC). Fault diagnosis in analog electronic circuits is in general tested along with one dimension: the generator frequency. In this paper, we present a novel approach that uses more than one dimension to test AEC (those new dimensions are: the load resistance & reactance, generator resistance & reactance). Proposed...
A method of a global parametric faults diagnosis in analogue integrated circuits is presented in this paper. The method is based on basic features calculated from a circuit's under test time domain response to a voltage step, i.e. locations of maxima and minima of circuit under test response and its first order derivative. The testing and diagnosis process is executed with the use of an artificial...
In the paper the application of the SVM (support vector machine) algorithm has been used for diagnosis and test of analog electronic circuits in time domain. Procedure designed belongs to simulation before test technique, where the fault models should be assumed at the before test stage (prototype stage). Both, parametric and catastrophic faults based on standard fault models are considered. Selected...
This paper presents a novel method to a multiple parametric faults diagnosis (global parametric faults - GPF) in analogue integrated circuits (AIC). The method is based on features of AIC time domain response to voltage step excitation, i.e. AIC response and its first order derivative maxima and minima locations. A circuit states classification is acquired with the use of linear evolutionary classifier...
This paper describes how increasing number of dimension of search space (in analog circuit diagnosis) can influence on identification of states of circuit under test (CUT). The criterion of optimization is the maximum number of identified states of CUT. In order to achieve this goal, first each state S and ambiguity set AS must be find and then optimized using Particle Swarm Optimization (PSO) algorithm...
An evolutionary technique for a linear analog circuit state recognition is presented in this paper. Transfer function zeros, poles and its amplification coefficient are determined by means of differential evolution. Time responses to a unit step stimulus for the circuit under test and for the evaluated phenotype are compared during the fitness calculation. Absolute response error of phenotype is minimized...
The method presented in this paper uses evolutionary computations to analog circuit testing stimulus shape optimization. The proposed testing excitation is a PWL waveform that generates responses of the tested circuit with appropriate relationship between current values of its specifications and the value of the observed parameter. The energy of error signal between nominal and actually obtained responses...
The testing and diagnosis catastrophic faults technique for analog high frequency (HF) circuits (passive filters and impedance matching circuits) is described in this paper. The novel method based on load and frequency as testing pair has been proposed. The impact of load on testing and diagnostic has been investigated. The best pairs of load and frequency have been chosen. The proposed approach of...
This paper presents an analysis of an influence of global parametric faults (GPF) on analogue integrated circuits (AIC) time domain (TD) response features, such as overshoot, delay time, rise time, maxima and minima, first differential maxima and minima. The novel approach is the analysis of relations and superrelations between features which are discussed in details. The presented results should...
Presented work focuses on detecting a single hard fault in analog electronic circuit in AC domain. The combined approach to analog circuit fault test frequency selection is proposed. Reduction of a fault dictionary size is the main goal of the method. It is achieved by the use of heuristic algorithm and modified fitness function. Simulated annealing as a search engine and fuzzy system as a fitness...
This paper discusses the optimization of input source frequencies to obtain the highest detection and location rate of a circuit under test. The minimum number of frequencies for distinguishes between fault and fault free elements are desired. We briefly describe the basic concepts of simulated annealing method and fuzzy evaluation (fitness) system. Presented application shows how to code the optimization...
This paper presents method of deriving optimal excitation signal maximizing probability of successful fault diagnosis. The approach uses evolutionary algorithm and wavelet analysis. The diagnosis procedure is conducted by means of specialized aperiodic excitation. Results are compared with fault diagnosis using unit step excitation. The method belongs to simulation before test (SBT) class of fault...
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