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The number of sensors, actuators and electronic control units present in cars have increased in the last few years. The Internet-of-Things (IoT) model has transformed modern vehicles into a co-engineered interacting network of physical and computational components. Vehicles have become a complex cyber-physical system where context detection has become a challenge. In this paper, we present a rule...
This paper describes a set of experiences collected into product development programs managing Business Agile transformation to deliver solutions to meet customer needs in worldwide market. In particular, we focus on all those activities capable of enabling the achievement of the product quality, in its meaning to deliver reliable products to the customer and thus able to generate value. We will focus...
With limited experiment devices and high arrival rate of requests, it is difficult for a remote control laboratory to satisfy all experiment requests within short period of time. This paper proposes a general device sharing scheme based on concurrent time-sharing to solve such problem in embedded experiments scenario. It has been verified that, under certain preconditions, such approach is feasible...
Nowadays, FPGAs are integrated in high-performance computing systems, servers, or even used as accelerators in System-on-Chip (SoC) platforms. Since the execution is performed in hardware, FPGA gives much higher performance and lower energy consumption compared to most microprocessor-based systems. However, the room to improve FPGA performance still exists, e.g. when it is used by multiple users....
Cloud computing has recently become popular information technologies in enterprises. More and more enterprises tend to move from traditional enterprise information systems (EIS) to private EIS. However, few studies have addressed the switching issues, especially in large enterprises. The purpose of this study is to investigate switching intentions from traditional EIS to private cloud EIS for large...
High Level Synthesis (HLS) tools improve the speed of FPGA hardware design entry compared to traditional hardware description languages by raising the level of design abstraction. Using compiler directives to guide the tool, a wide variety of hardware architectures can be obtained without modification of the original behavioural code. However, selecting an optimal application of directives from this...
Video compression is a key enabling technology for multimedia communication. The need for high-quality video processing in multimedia products is increasing, leading to enhancement in coding techniques. In future, multimedia systems require efficient video coding algorithms that provide high and efficient compression. The H.264 is one of the latest coding standards that provide high compression efficiency...
Certification has been proved as an essential mechanism for achieving different security properties in new systems. However, it has important advantages; among which we highlighted the increasing in users trust by means of attesting security properties, but it is important to consider that in most of cases the system that is subject of certification is considered to be monolithic, and this feature...
The rounding modes of floating point arithmetic are usually simplified in implementations of alternative number systems, including the Logarithmic Number System (LNS), to a single round-to-nearest mode requiring internal guard bits that are exponentially expensive to provide. Noting that rounding takes significant time and hardware, this paper describes two innovations that enhance LNS performance,...
When software fault injection is used, faults aretypically inserted at the binary or source level. The former isfast but provides poor fault accuracy while the latter cannotscale to large code bases because the program must be rebuiltfor each experiment. Alternatives that avoid rebuilding incurlarge run-time overheads by applying fault injection decisionsat run-time. HSFI, our new design, injects...
This paper presents a fast systolic priority queue architecture usable in a traffic manager. The purpose of the traffic manager is to schedule the departure of packets on egress ports in a network processing unit. In the context of this work, this scheduling should ensure that packets are sent in such a way to meet the allowed bandwidth quotas for each packet flow. Also, an important goal is to reduce...
Complex computational systems can experience undetected faults that produce incorrect outputs. However, error measures can be adopted to quantify these incorrect results and evaluate computational robustness. This paper offers an approach to assessing the worst case scalable robustness (WCSR) of an algorithm paired with an error measure, as well as the i.i.d. average case scalable robustness (ACSRiid)...
The number of entities in large-scale knowledge bases has been growing in recent years. The key issue to entity linking using a knowledge base such as Wikipedia is entity disambiguation. The objective of our proposing system is to disambiguate entities in documents and link entity mentions to their corresponding Wikipedia articles. To this end, our system ranks the set of candidate entities based...
The fault injection technique is utilized for simulation-based verification of safety-related analog and mixed-signal (AMS) circuits for compliance with safety requirements in the presence of hardware faults. Exhaustive fault simulation is very time consuming with respect to the number of faults to simulate at circuit level. For efficient simulation-based verification, a fault grouping approach is...
Many new cloud-focused applications such as deeplearning and graph analytics have started to rely on the highcomputing throughput of GPUs, but cloud providers cannotcurrently support fine-grained time-sharing on GPUs to enablemulti-tenancy for these types of applications. Currently, schedulingis performed by the GPU driver in combination with ahardware thread dispatcher to maximize utilization. However,...
As power becomes one of the most important re-sources to provision while building modern HPC systems and applications, it becomes crucial to obtain deeper insights into applications' power and thermal characteristics. There exists aneed to correlate application context with processor-level andsystem-level power and thermal measurements. Existing profilingtools to monitor power and thermal measurements...
Memory corruption vulnerabilities are the root cause of many modern attacks. Existing defense mechanisms are inadequate; in general, the software-based approaches are not efficient and the hardware-based approaches are not flexible. In this paper, we present hardware-assisted data-flow isolation, or, HDFI, a new fine-grained data isolation mechanism that is broadly applicable and very efficient. HDFI...
In this paper, we identify address aliasing as an important underlying mechanism causing measurement bias on modern Intel microarchitectures. By analyzing hardware performance counters, we show how bias arises from two external factors:size of environment variables, and characteristics of dynamically linked heap allocators. We demonstrate ways to deal with this type of bias, through runtime detection...
The Internet of Things promises an always-connected future where the objects surrounding us will communicate in order to make our lives easier, more secure, etc. This evolution is a research opportunity as new solutions must be found to problems ranging from network interconnection to data mining. In the networking community, innovative solutions are being developed for the Device Layer of the Internet...
This paper discusses an implementation of runtime verification for embedded software running on a System-on-Programmable-Chip (SoPC) composed of a micro-controller and a FPGA. The goal is to verify at runtime that the execution of the software on the micro-controller conforms to a set of properties. To do so, a minimal instrumentation of the software is used to send events to a set of monitors implemented...
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