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LDPC decoders on faulty hardware have received increasing attention over the last few years, mainly motivated by reliability issues in emerging nanotechnologies. As a main result, it was shown that LDPC decoders are naturally robust to hardware faults. LDPC encoders on faulty hardware have received less attention, and they are expected to be less robust to hardware faults. In this work, we propose...
Chinese next generation broadcast wireless (NGB-W) systems are aimed to provide high-speed, ubiquitous, and secure broadcast services and tri-play services to massive users. New terrestrial broadcast techniques are needed to support these services in NGB-W systems. In this paper, a new set of quasi-cyclic (QC) low density parity check (LDPC) codes with a moderate code length and a wide operation range...
Densely deployed wireless networks is one of the most important solutions for spectrum shortage expected by 2020 with a huge economic impact. This paper proposes decoding schemes for high- dense vehicular multiway multirelaying (HDV-MWMR) systems comprising multiple multiway relays to serve huge number of users or devices. Due to the nature of huge number, instead of using perfect scheduling, we consider...
Highly reliable LDPC ECC is introduced to improve the reliability of solid-state drives (SSDs). Although conventional AEP-LDPC ECC [3] is 12x highly reliable than BCH ECC, its error-correction capability is degraded due to the burst-errors and inaccurate log- likelihood ratio (LLR). To improve the reliability of TLC NAND flash, this paper proposes the burst-error masking (BEM) and program-disturb...
This article presents a simple, less computational complexity method for constructing exponent matrix (3, K) having girth at least 8 of quasi-cyclic low-density parity-check (QC-LDPC) codes based on subtraction method. The construction of code deals with the generation of exponent matrix by three formulas. This method is flexible for any block-column length K. The simulations are shown in comparison...
It is almost always assumed that the algebraic structure underlying non-binary Low-Density Parity-Check (LDPC) codes are Finite Fields. However, when considering non-binary LDPC belief-propagation (BP) decoding, Finite Fields are actually over constrained. In this contribution, we discuss the minimal requirements of the algebraic structure used for non-binary LDPC decoding which we denote Finite Division...
This work proposes a construction for high-rate generalized concatenated (GC) codes. The proposed codes are well suited for error correction in flash memories for high reliability data storage. The GC codes are constructed from inner nested binary Bose-Chaudhuri-Hocquenghem (BCH) codes and outer Reed-Solomon (RS) codes. For the inner codes we propose extended BCH codes, where we apply single parity-check...
Low Density Parity Check (LDPC) codes have been widely used in communications systems due to their high error correction capabilities. Recently these codes are also investigated for being exploited in high performance storage systems, especially when Non-Volatile Memory (NVM) technologies are used. The main drawback of using LDPC codes in storage systems with a high number of parallel channels is...
In this letter, belief propagation (BP) based approximation methods for low density parity check (LDPC) codes are adapted to the Luby transform (LT) soft decoder structure in order to reduce its computational complexity. The bit error rate (BER) performances of the algorithms over the binary input additive white Gaussian noise (BIAWGN) channel are obtained by both theoretically and simulations. For...
The recently developed orthogonal frequency-division multiplexing relying on index modulation (OFDM-IM) is adopted to the in-vehicle power line communications (PLCs) in order to combat the deleterious effects of frequency-selective fading and impulsive noise, whilst improving the energy efficiency of data communications. Furthermore, the low density parity check (LDPC) coding is invoked to further...
Adaptive linear programming (ALP) decoders are mainly used for decoding low-density parity-check (LDPC) codes. The principle of ALP decoders is based on generating redundant-parity check equations, which could eliminate fractional solutions of linear programming (LP) decoders. These generated redundant parity check equations increase the error rate performance of decoder. In this paper, LP model is...
This paper is based on cyclic redundancy check based encoding scheme. High throughput and high speed hardware for Golay code encoder and decoder could be useful in digital communication system. In this paper, a new algorithm has been proposed for CRC based encoding scheme, which devoid of any linear feedback shift registers (LFSR). In addition, efficient architectures have been proposed for both Golay...
Low density parity check codes nowadays use in modern system due to their excellent performance. There are different message passing algorithm for LDPC codes to decode. In this paper, we have mention bit flip algorithm in brief and gave its bit error performance over AWGN channel via simulation result. For this communication, we use BPSK i.e. Binary phase shift keying digital modulation technique...
Forward Error Correction is a technique which is used to correct the modified data when transmitted over a noisy channel. Forward Error correcting codes detect and correct errors with decoders. In this paper Error Recovery Algorithm is proposed which combines the Bezier curves over Galois Field GF (p⁁m) and the Low Density Parity Check Codes to generate non-binary codeword. The proposed decoder is...
Read-disturb Modeled LDPC (RDM-LDPC) ECC is proposed. Conventional Advanced Error-Prediction LDPC (AEP-LDPC) [1] corrects data-retention errors of data-storage-purpose SSDs storing photos, movies, etc. but cannot correct read-disturb errors. For read-intensive computing-purpose enterprise SSDs, this paper analyzes the read-disturb errors, develops the error model of 1Xnm TLC NAND Flash memory and...
This paper investigates the linear network coding map in a Physical-layer Network Coding (PNC) operated two-way relay network. To realize the full potential of Physical-layer Network Coding in high SNR regimes, we need to use high-order signaling beyond BPSK/QPSK. In a PNC system with high-order signaling, we can have many different choices for the network coding (NC) map. For linear network coding,...
In this work, we propose the construction of turbo codes for high rate transmission over block-fading channels. These codes are suitable for modern standards such as the 3GPP-LTE, in which high data rates are required. Our designs are based on channel multiplexing schemes initially developed for block fading channels, namely horizontal multiplexing and h-n-diagonal multiplexing. However, to attain...
Soft decision decoding for Reed-Solomon codes has been proven to provide large coding gains in comparison to conventional hard decision decoding. Out of the numerous soft decoding algorithms, information set decoding has turned out to be an efficient approach, if coding gains larger than 0.5 dB are desired for the widely used RS(255,239) code. In this paper we investigate new hardware implementations...
Implementation of Quasi-Cyclic (QC) Low Density Parity-Check (LDPC) decoder on FPGA devices has shown great interest in both wireless communication, as well as error correction for Flash memories. This paper presents an FPGA flooded LDPC decoder which uses multiple codeword processing for efficient memory utilization. It is based on a partially parallel implementation, which relies on memory blocks...
Digital Video Broadcasting — Satellite — Second Generation (DVB-S2) and Digital Video Broadcasting — Return Channel via Satellite (DVB-RCS) are two important commercial satellite communications (SATCOM) standards, for forward link and return link information transmission via satellites, correspondingly. Advanced channel coding schemes have been designed in DVB-S2 and DVB-RCS to mitigate the information...
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