The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A large enough separation in the frequency domain between signals going in opposite directions is instrumental to facilitate the implementation of transceivers able to isolate the receiver from the high power transmitted signal. A more flexible allocation of spectrum requires the application of interference cancellation countermeasures. In this paper we address the digital processing involved in the...
To meet the requirements of the next high generation high-performance networking switches and routers, system integration based on the Three-dimensional (3D) System-in-Package (SiP) technology is being studied and developed. In this paper, we report the development of a 3D SiP using the organic interposer technology. A 3D SiP is designed and manufactured with a large size organic interposer with fine-pitch...
The EMIB dense MCP technology is a new packaging paradigm that provides localized high density interconnects between two or more die on an organic package substrate, opening up new opportunities for heterogeneous on-package integration. This paper provides an overview of EMIB architecture and package capabilities. First, EMIB is compared with other approaches for high density interconnects. Some of...
Silicon photonics enables new pinnacles of large-scale photonic integration, aiming at the need for large bandwidth in next-generation data centers and interconnects systems. Ultra-high data streams are thus required in the smallest footprint using the lowest amount of power possible. On the silicon-on-insulator platform, microring modulators are a promising solution providing desirable compactness...
Ultra-high data rate is required for future cloud computing and interconnects systems, for which integrated optical transceivers provide promising solutions. We report 66 Gb/s, on-off keying (OOK) operation of a silicon microring modulator (MRM) consuming a low power of 15 fJ/bit. To the best of our knowledge, this result features the fastest binary shift keying operation using a MRM.
In this paper, a new on-interposer passive equalizer was proposed for the next generation High Bandwidth Memory (HBM) with 1024 I/O lines and 30 Gbps data rate. It is a coil-shaped shunt metal line and embedded on a ground plane to reduce area consumption on a signal layer and to maintain fine pitch of 10 um. The proposed equalizer utilizes its inductance and resistance to perform a high-pass filter...
A novel multi-chips Fan-out Wafer Level Package (FOWLP) with fine pitch Cu pillar bumps was presented to accommodate volumes of I/O requirements on a BGA organic substrate. Due to the manufacturing limitation, cost and reliability consideration of fine-pitch BGA substrate, chips with extremely fine pitch RDL routing (width/space=2/2um) and a 2.nD wafer level carrier was integrated as system-in-package...
An approach for a low-power chip-scale package is described, that provides a laser output with a programmable frequency across 50 nm of bandwidth centered at 1550 nm, and a resolution of one part in 1014.
A semiconductor industry has been encountered a memory bandwidth bottleneck toward a high density and high bandwidth system. In order to overcome those limitations, a 3D stacked high bandwidth memory (HBM) based on a through silicon via (TSV) and fine pitch interposer technology is lately introduced. By adopting this structure, thousands numbers of input/output (I/O) channels with a fine pitch can...
Demanding signal- and power-integrity performance requirements in high-performance computing (HPC) systems require careful trade-space analysis when prioritizing layer allocations in printed circuit board (PCB) designs. Typically, the topmost layers in a stackup construction are the most desirable for enhancing both signal and power delivery capabilities. In this paper, we use analytical performance...
Recent successful demonstrations of radios for in-band full-duplex (IBFD) wireless systems offer interesting network-level case studies. The impact of such a capability on a cellular network as a whole is an open research area. IBFD self-backhauling for small cells is one interesting use case of such a capability proposed in this paper. It refers to the use of same frequency band for backhaul and...
Non-standardized scan interface within and across system-on-chips (SoCs) limits test-data reuse for intellectual properties (IPs). To overcome this limitation, we present a flexible and dynamic scan interface architecture that enables reuse of test-data for a given IP across SoCs with different scan pin configurations. The dynamic nature of this architecture also enables variable shift frequencies...
Semiconductors continue to be the foundation for computing and communications solutions, the basis of the Internet of Everthing, and the primary driver in the future of electronics applications. Moore's Law has led to evermore-powerful smart phones, tablets, personal computers, and data centers. It has enabled computing to become a seamless and powerful force in our homes, offices, cars, factories,...
We report the design of a new application-specific integrated circuit (ASIC) for use in radio telescope correlators. It supports the construction of correlators for an arbitrarily large number of signals. The ASIC uses an intrinsically low-power architecture along with design techniques and a process that together result in unprecedentedly low power consumption. The design is flexible in that it can...
The emergence of the internet of everything (IoE) demands high-performance, real-time multi-media and wideband networking in battery-operated mobile systems. For this reason, higher bandwidth and lower power mobile DRAMs are becoming increasingly critical. As promising candidates of next-generation mobile DRAM, the development of LPDDR4 [1] and wide-IO2 (WIO2) DRAM is ongoing these days. The conventional...
Spurred by the industrial demands for terabyte/s bandwidth graphics module, high bandwidth memory (HBM) has been emerged to overcome the limitations of conventional DRAMs. Additionally, due to the fine pitch and high density interconnect routing between GPU and 4 HBMs in 2.5D terabyte/s bandwidth graphics module, HBM interposer has also been to the force. However, several signal integrity issues of...
Advancements in packaging technologies are required to meet the future bandwidth, and space- and energy- efficient demands of ICT systems. One of the key technologies is 2.5D packaging using a silicon interposer with through silicon vias (TSVs). However, forming the TSV and thinning the wafer makes the Si interposer's cost high. Furthermore, using an organic substrate causes high electrical losses...
As total system bandwidth increased, memory industry has been imposed to satisfy its requirements. At last, innovative next generation memory named high bandwidth memory (HBM) with extremely fine micro-bump pitch of its bottom die is introduced for terabytes/s bandwidth graphics module. To establish HBM based graphics module, it becomes essential to fabricate silicon interposer due to its capability...
In this paper, Temple Tower Kalasam shaped antenna fed by coplanar waveguide (CPW) with vertical slot is presented for dual band applications. The vertical slot is placed on the ground plane to achieve dual band operating frequencies. The antenna designed on a FR4 dielectric substrate with a permittivity of 4.4 and size of 14 × 18 × 1.6 mm3 to generate dual resonant mode, covering 4.9 GHz at C band...
Server consolidation is one of the critical techniques for energy-efficiency in cloud data centers. As it is often assumed that cloud service instances (e.g., Amazon EC2 instances) utilize the shared storage only, most existing work did not consider the problems introduced by utilizing local storage. In recent years, however, cloud service providers have been providing local storage for cloud users,...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.