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Scaling the fin width in fully-depleted FinFETs can improve short channel effect control, but may be accompanied by a on-state drive current degradation. Ion implantation is a leading candidate as the means to introduce dopants into the silicon, but is often accompanied by amorphization when highly doped source-drain regions are formed. Thin-body silicon recrystallization after amorphization is not...
We demonstrate a self-aligned process for forming fully- depleted SOI MOSFETs with deposited metal-silicon S/D junctions and gate lengths as short as 75 nm. For the devices presented here, the metal S/D regions were formed of deposited Al which is self-aligned to the gate and STI edges, with Si3N4 junction passivation to suppress Fermi-level pinning. Inverse modeling of the electrical data indicates...
A non-classical device structure namely self-aligned quasi-silicon-on-insulator (SOI) metal-oxide semiconductor (MOS) field-effect transistor with pi-shaped semiconductor conductive layer (SA-piFET) is presented, seeking to improve the performance and upgrade the reliability of the SOI-based devices. Designed to equip with a SA single crystal silicon channel layer, plus a natural source/drain (S/D)...
Transconductance (gm) enhancement in n-type and p-type nanowire field-effect-transistors (nwFETs) is demonstrated by introducing controlled tensile strain into channel regions by pattern dependant oxidation (PADOX). Values of gm are enhanced relative to control devices by a factor of 1.5 in p-nwFETs and 3.0 in n-nwFETs. Strain distributions calculated by a three-dimensional molecular dynamics simulation...
Plasma-exposed Si surface related to Si recess in source/drain region was investigated in detail for various superposed bias configurations with frequencies of 13.56 MHz and 400 kHz. Two different bias powers were utilized by an inductively coupled plasma reactor (ICP). The surface layer (SL) and the interfacial layer between the SL and Si substrate (IL) were analyzed by spectroscopic ellipsometry...
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