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We report the fabrication of hybrid structures composed of III-V active photonic crystal bonded on top of silicon wires. Laser is obtained from slow light waveguides and from nanocavities made in an InP-based membrane containing quantum wells, the emitted light being coupled evanescently to the SOI wires.
The 5×4.2 mm2 chip of the SiC DIMOSFET was fabricated and tested. The drain-source avalanche breakdown voltage without any gate bias (Vgs=0V) is measured to be >1000V. The drain current (Id) >40A is observe under the conditions of Vds=1V and Vgs=+20V. Typical Ron and specific Ron are measured to be 22 mΩ and 3.5 mΩcm2 with Vth=2.3V. The SiC DIMOSFET is introduced into the PE circuits of the...
In this paper, GaN-based HFET devices on 4-inch Si substrates were fabricated, and the device characteristics were examined. As a result, the maximum drain current was estimated to be over 115 A using MIS-structures. A trade-off between the specific on-resistance (RonA) and the breakdown voltage (Vb) was improved using carbon doped buffer layers, resulting in obtaining RonA=3D 5.9 mΩcm2 and Vb=3D...
Vertical arrays of high aspect ratio (>100) InSb nanowires with diameters of ~20 nm have been fabricated using a Porous Anodic Alumina (PAA) template that is supported on a Si substrate with a thin layer of titanium (Ti) sandwiched between them. The process described here uses a reverse anodization technique to penetrate the hemispherical pore bottom barrier oxide layer prior to the electrodeposition...
The direct current pumping from highly doped silicon microwire to InP-based III-V active layer for spontaneous light emission was realized by air ambient plasma-assisted direct bonding. The semi-conductive properties of the hetero-integration and the effects of plasma-assisted bonding process on InGaAsP multiple quantum well (MQW) were measured and discussed. The electrical pumping from silicon microwire...
The COmpound Semiconductor Materials On Silicon (COSMOS) program of the U.S. Defense Advanced Research Projects Agency (DARPA) focuses on developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices with high-density silicon circuits. The technical approaches being explored in this program include high-density micro assembly, monolithic...
The novel direct band gap, dilute nitride Ga(NAsP)-material system allows for the first time the monolithic integration of a III/V laser material lattice matched to Si substrate. This lattice-matched approach offers the possibility for a high-quality, low defect density integration of a III/V-laser material potentially leading to long-term stable laser devices on Si-substrate. The present paper introduces...
The liquid phase deposition (LPD) was used to deposit silicon oxide (SiO2) layer on AlGaAs near room temperature. The LPD method is not only simple but also can obtain the SiO2 very economically. Both the aqueous solution of hydro-fluosilicic acid (H2SiF6) and boric acid (H3BO3) were used for the LPD solution. After rapid temperature annealing (RTA) at 300°C for 1 min, the leakage current density...
We present the effect of active carrier concentration on the specific contact resistivity (ρc) of in-situ molybdenum (Mo) Ohmic contacts to n-type InAs. It is observed that, although the Fermi level pins in the conduction band for InAs, the contact resistivity decreases with the increase in InAs active carrier concentration. The lowest ρc obtained through transmission line model measurements was (0...
We fabricated various kinds of III-V semiconductor nanowires and core-shell nanowires using selective area metalorganic vapor phase epitaxy (SA-MOVPE) on (111) oriented substrates, such as GaAs, GaAs/AlGaAs, InP, InP/InAs/InP on III-V substrates, and InAs and GaAs on Si. As for device applications, we fabricated GaAs/GaAsP core-shell nanowire photo-excited lasers, and InP core-shell pn junction solar...
We have investigated the selective area growth of InP on nano-patterned Si substrates with SiO2 mask by molecular beam epitaxy. By optimizing the growth conditions, the growth of one separate InP single crystallite for each Si opening has been accomplished. It is found that when single crystallites coalesced into larger grains beyond Si openings, lattice strains were introduced in the grains because...
We investigate nano-eptiaxial lateral overgrowth (NELOG) of InP from the nano-sized openings on a seed layer on the silicon wafer, by Hydride Vapor Phase Epitaxy (HVPE). The grown layers were analyzed by cathodoluminescence (CL) in situ a scanning electron microscope (SEM) and transmission electron microscopy (TEM). The results from InP:S growth shows that the boundary plane of the grown layer has...
As in Si CMOS, the incorporation of mechanical strain offers the possibility of improving the performance of III-V field effect transistors (FETs). Quantifying its potential and providing fundamental understanding of the impact of strain are the goals of this study. This paper reports an investigation of the impact of <;110> uniaxial strain on n-type InAlAs/InGaAs HEMTs with a 70% InAs channel...
Epitaxial growth of GaP on a Si substrate with a GaInP interlayer by a low-pressure metalorganic chemical vapor deposition were investigated using the atomic force microscopy. The surface roughness Ra was decreased from 2.7 nm to 1.3 nm by only inserting the GaInP interlayer under the 600°C. The GaP layer using the GaInP interlayer was optimized under various growth temperature between 500°C and 650°C...
A low cost & feasible system on package solution on the basis of BCB and silicon wafer (10 Ohm·mm)-Si-Based 3D MMCM package solution is presented in this paper. What is more, a standard Si-Based MEMS process is employed to achieve package and revision of a GaAs-Based Monolithic Amplifier circuit. The measured results show that input return loss is less than 20 dB; moreover, small signal gain is...
A low-temperature direct wafer bonding technique has been researched by using plasma treatment. Si-to-Si direct bonding strength was 1.6 MPa by using plasma pretreatment prior to the heating and weighting. 1.4 MPa of InP/Si bonding strength was obtained by improving chemical cleaning process. On the other hand, photoluminescence properties of GaInAs/InP quantum wells bonded on Si substrate were investigated...
We demonstrated the intersubband absorption through silicon ion implantation and subsequent rapid thermal annealing in undoped InGaAs/AlAsSb coupled double quantum wells. The effective temperature region of carrier activation for the implanted silicon ions is about 470~600 °C. For the sample with a silicon implantation dose of 1e14 cm-2, we obtained an actual carrier density of ~ 7.5e13 cm-2 (~75%...
An improved parasitic elements extraction method applied to GaN on Si devices is presented. Genetic-algorithm based procedure is used to determine a high quality reliable starting values for the extrinsic parameters of proposed small-signal model. Local optimization technique is then used to refine the initial value and find the optimal value for each model element. The validity of the developed method...
We have developed III-V-OI MISFETs on Si with buried SiO2 and Al2O3 layers fabricated by low damage and low temperature direct wafer bonding processes. The III-V-OI MISFETs with both buried SiO2 and Al2O3 layers have demonstrated the high electron mobility of 1200 cm2/Vs. In addition, we found that the buried Al2O3 layers can improve the interface condition between III-V and the buried oxide layers,...
This paper presents an in-depth investigation of the electrical properties of charge trap memories with AlN based storage layers. The memory performance and reliability are studied in details and compared with the ones of a reference device using standard Si3N4 as storage layer. An engineered charge trapping layer is also proposed, made by an AlN/Si3N4 double layer, which shows reduced program/erase...
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