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This paper introduces a new high voltage double partial SOI (DPSOI) with variable-k (permittivity) dielectric for improving breakdown voltage. The mechanism of breakdown is that the length of vertical ionization integral increases significantly, because of the two symmetrical windows results it by folding effect and the additional electric field produced from variable-k dielectric buried layer modulates...
Gated resistor is an accumulation mode device without any junction (p-n junction or Schottky junction) in which the channel doping concentration is generally equal to doping concentration on the source and drain. Gated resistors have been fabricated to avoid the super steep and troublesome doping profile of conventional Metal Oxide Semiconductor Field Effect Transistor (MOSFET). It simplifies the...
An original approach is applied to obtain horizontal InAs nanowires with high density and uniform direction on the patterned silicon-on-insulator substrate via metal organic chemical vapor deposition. Moreover, novel Si-based horizontal InAs nanowire transistors are realized initially. Both all-gate-around structure and InAs bulk channels can boost the transistors to achieve better gate-controlled...
This paper describes a complete process/design co-optimization methodology based on Fully Depleted SOI (FDSOI) technology. A process optimization is detailed through significant effective capacitance reduction, in order to optimize jointly frequency/leakage ratio and high frequency performances. In this objective, an efficient and low cost offset-spacers morphology has been designed to achieve maximum...
We experimentally demonstrate a silicon-on-insulator microring resonator filter that uses bent contradirectional couplers to eliminate the filter's free spectral range. The filter's measured side-mode suppression is greater than 15 dB, the extinction ratio is ∼19 dB, and the 3-dB bandwidth is ∼23 GHz.
We investigate for the first time the influence of the back gate bias (VB) in the main digital and analog parameters on Silicon-On-Insulator (SOI) omega-gate nanowire devices down to 10 nm width (W). For wider channel, it was observed that for high negative VB the subthreshold swing (SS) and DIBL are decreased due to the better channel confinement while the intrinsic voltage gain is almost insensitive...
Motivated by the TFET (tunneling field effect transistor) technology, we investigate the temperature and gate overlap/underlap influence on the capacitance of p-i-n diodes fabricated with UTBB FDSOI. The underlap-overlap architecture modifies the split capacitance curves essentially when the back interface is depleted. As a result, the extracted front gate oxide (tOX) and silicon film thickness (tSi)...
The paper reports upon the design and characterization of a resistive O2 sensor, which is fully CMOS-compatible and is based on an ultra-low-power Silicon on Insulator (SOI) micro-hotplate membrane. The microsensor employs SrTi0.4Fe0.6O2.8 (STFO60) as sensing layer. Thermo-Gravimetric Analysis (TGA) Energy-Dispersive X-ray Spectroscopy (EDX), X-ray Diffraction (XRD) and Scanning Electron Microscope...
In this paper the results of layout design and circuit-topological computer simulation of some elements of analytical microsytem-on-chip with the “silicon-on-insulator” (SOI)-structures are presented. These elements were: an input cascade, a basic element of operational amplifier and a ring oscillator based on standard bulk CMOS technology and CMOS technology with the SOI-structures. Also the polysilicon-on-insulator...
Silicon-on-insulator (SOI) offers distinctive features to photodetectors based on optical confinement, carrier confinement and thermal isolation, resulting in enhanced light absorption, sensitive detection of photo-generated carriers and sensitivity in wider wavelength range as a bolometer, respectively. Specifically, the waveguiding modes in the SOI photodiode can be induced by the diffracted light...
Introduction: In the past decades, fiber-to-the-home access networks, chip-to-chip interconnects, and on-chip optical interconnects have gain widespread interest owing to the inherent advantages of large bandwidth, high signal noise ratio, small size and low power consumption. Because of the compatibility with existing complementary metal-oxide-semiconductor (CMOS) technology, Si photonics became...
A low insertion loss asymmetric slot waveguide based silicon polarizing beam splitter is designed and fabricated, without adopting any strip-slot mode converter. The splitter can realize a TM light cross-coupling with a strip waveguide, while little TE light coupling can happen.
Arrayed waveguide grating (AWG) has become a key component in commercial wavelength division multiplexing (WDM) systems for its multichannel wavelength selective function [1]. A 4×4 arrayed waveguide grating (AWG) demultiplexer is designed and fabricated based on silicon on insulator (SOI) nanowire. All of the device design is performed based on the SOI strip nanowire waveguide with SiO2 upper-cladding...
We describe a planar photonic circuit in silicon-on-insulator that efficiently generates pairs of non-degenerate photons in a single mode output channel through spontaneous four-wave mixing when pumped with 10's of µW of continuous-wave radiation at wavelengths near 1.5 µm. The structure is based on a set of three coupled photonic crystal microcavities, each of which is judiciously coupled to single...
Grating couplers realized on a Silicon-on-Insulator (SOI) platform are an efficient means of coupling light from a single-mode optical fiber into silicon photonic waveguides. Grating couplers can be 1D, coupling light with a fixed polarization into a single waveguide, or 2D, in order to couple light with unknown polarization into a pair of silicon waveguides. In this work we review computational approaches,...
A visible light photodiode with enhanced bandwidth is proposed in a CMOS compatible silicon on insulator platform. By depositing a thick oxide and a thin silicon nitride layer and proper patterning of nitride, collected power can be significantly enhanced.
The emerging application of organic materials to the integrated photonics led to the definition of the Silicon Organic Hybrid (SOH) technology, that is a promising approach to bring active functionalities on an intrinsically passive silicon substrate. Erbium-doped molecular materials were demonstrated to provide IR emission in the C band when grown on silicon as solution processed thin films, enabling...
This paper presents a continuation of an investigation into the behavior of lead magnesium niobate-lead titanate, Pb(Mg0.33Nb0.67)0.65Ti0.35O3) (PMNT) thin film at high frequency through electromagnetic (EM) simulation. The purpose of this paper is to improve the electrical characteristics. The electrical characteristics were analyzed on CPW built on PMNT thin films. In this study, we focus on the...
The effects of drain voltage in threshold voltage (VTH) variability in extremely narrow silicon nanowire (NW) channel FETs are measured and statistically analyzed. It was found that the drain-induced variability and “within-device” variability increase as the NW width decreases to 2nm. The origin of the increased variability is ascribed to quantum confinement due to nanowire width asymmetry.
A novel high-voltage interconnection (HVI) structure with dual trenches for 500V SOI-LIGBT is proposed in this paper. Compared with the conventional dual trenches structure, the proposed structure features a shallow trench (T1) and a deep trench (T2) beneath the HVI. By employing the shallow trench (T1), the potential can easily penetrate into the deep trench (T2) and the total potential sustained...
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