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Advanced inductively coupled plasma techniques and surface treatments have been used to demonstrate 5 nm conformal shallow junctions at low energy with no structure damage for both silicon (Si) and germanium (Ge). N-type PH3 plasma-assisted doping was characterized by dopant diffusion and electrical activation with increasing wafer temperature. Plasma-assisted doping at high wafer temperature showed...
We investigate a novel Ti Chemical Vapor Deposition (CVD Ti) technique for source/drain and trench contact silicidation. This work is a first demonstration of a highly selective, superconformal Ti process that exhibits a low p-type CVD Ti/SiGe:B contact resistivity (pc) down to 2.1×10−9 Ω.cm2 (a 40% reduction vs. PVD Ti), matching the lowest published values [1-5]. A competitive n-type CVD Ti/Si:P...
It has been reported that erbium (Er) is a source of optical emission at λ=1.54 pm due to 4I13/2 →4I15/2 transition of Er3+. A method of oxygen (O) codoping with Er has attracted attention as a candidate for obtaining more efficient optical gain by forming Er:O complex. Although several simulations predict the equilibrium structure of Er:O complex, it is difficult to understand experimentally how...
Germanium (Ge) is a potential candidates to replace silicon (Si) due to its higher carrier mobility, which is the key point for realizing device high-drive-current. However, fabricating highly activated np junction in Ge is challenging due to the severe damages introduced from ion-implantation interact with dopant during subsequent annealing process, and results in dopant deactivation. Further optimization...
Magnesium silicide (MgSi) on Si use in Tunnel FET source-channel region that can improve the drive current to 2 order and more. In this work, we propose to deposit Mg and Si for multi-stacks by RF magnetron sputtering and evaluated the firmed Mg2Si. That has an atomically flat interface and surface are formed before and after annealing and Mg atoms encroachment into Si, therefore the Mg2Si on Si was...
We demonstrated the formation of ultra-shallow n+/p junctions in Si using an arsenic-doped Sol-Gel Coating (SGC) (Tokyo Ohka Kogyo Co., Ltd.) [1] and Flash Lamp Annealing (FLA). A high arsenic dopant concentration of 1.2×1020atoms/cm3 (Xj=9.0nm, Rs= 1203ohms/sq.) with a good junction profile (2.2nm/decade) was realized with 1.4ms FLA. These results indicate that this technique can be used for conformal...
The aggressive scaling of semiconductor technologies with each node generates several opportunities for ion implantation solutions to address key scaling challenges (device performance, SCE, leakage, variability, reliability, etc.). Optimization of ion implantation and integration with annealing and other processes is providing pathways for incorporating new materials and device architectures for...
Significant stress is induced in the crystalline Si area around a Cu-filled Through Silicon Via (TSV) due to the large mismatch in the co-efficient of thermal expansion (CTE) between Si and Cu. As a result, CMOS devices fabricated within the stressed Si region will show undesired variations in their electrical performance. This paper reports a novel method to isolate the TSV-induced stress from active...
Silver (Ag) has been emerging as an attractive die-attach material for high power devices because of its highest thermal conductivity among metals and high melting stability. The most well-known silver die-attach technique is to sinter micro-or nano-silver pastes. The challenging issues of sintered Ag joints are pores in the joint and migration of unfriendly species such as chlorine ions through these...
An experimental method was introduced for understanding the exact relationships among polarization, coercive field, and electric field across the ferroelectric layer. They characterized the ferroelectric properties closed inside the metal/ferroelectric/insulator/semiconductor gate stacks. Using the method, we found that N2-dominant-gas annealing process was effective for improving the ferroelectricity...
The purpose of this study was to provide a low cost manufacturing solution for Silicon Trench based Schottky rectifiers utilizing NiPt alloy composition that produces multiple barrier heights and provide designers the option to easily adjust the barrier height (BH) for rectifier designs. Higher temperatures needed to obtain larger barrier heights are generally unfavorable for trench-based Schottky...
The novel use of SiCN underneath TEOS oxide as a bonding surface in the wafer bonding of Backside-illuminated (BSI) sensor is proposed and the mechanism of void control by SiCN is clarified. In general, high-temperature processing results in generating voids between the wafer interfaces after bonding due to the release of high-pressure H2O contained in TEOS. In the proposed mechanism, the SiCN exposed...
Wafer-level bonding of LiNbO3 (LN) and Si with thermally grown SiO2 layer is demonstrated using surface-activated bonding method for the realization of LiNbO3-on-Insulator (LNOI) on Si.
Different GaAs//Si wafer bonding approaches are compared in order to fabricate III-V tandem solar cells. Bonding interface characteristics and electrical properties will be discussed for standard and improved direct wafer bonding sequences as well as for covalent bonding technique using SAB.
Two unique gate oxide failure mechanisms are associated with deep trench processes for a 0.18 μm power semiconductor device. One failure mode is a “mini-LOCOS” defect, that is due to inadvertent oxidation of Si in the active area during deep trench oxidation. The other failure mode is due to slip associated with dislocations from the deep trenches. These defects are eliminated by optimizing the SiN...
Plasma profiling time-of-flight mass spectrometry (PP-TOFMS) is studied for microelectronics applications. Comparative studies with secondary ion time-of-flight mass spectrometry (TOF-SIMS) are presented. PP-TOFMS delivers similar depth-resolved composition information as TOF-SIMS but much faster. For example PP-TOFMS allows assessing the formation of silicides over few nanometers upon annealing of...
The purpose of this study was to provide a low cost manufacturing solution for Silicon Trench based Schottky rectifiers utilizing NiPt alloy composition that produces multiple barrier heights and provide designers the option to easily adjust the barrier height (BH) for rectifier designs. Higher temperatures needed to obtain larger barrier heights are generally unfavorable for trench-based Schottky...
We report on the photoresponse of p-Si/n-SiC heterojunctions and the electrical characteristics of SiC/Si hetero-junction bipolar transistors (HBTs), both of which are fabricated by bonding SiC and Si layers. We find that in the photoresponse measurements the square root of the quantum yield almost linearly depends on the photon energy and the absorption edge (1.2 v) is close to the bandgap of Si...
We demonstrate a bonding method for combining silicon and quartz glass wafers using a sequential wet chemical surface activation (i.e., SPM→RCAl cleaning). After a multistep post annealing at 200°C, strong bonding with no voids or microcracks was obtained. Based on the detailed surface and bonding interface characterizations, a bonding model was developed to gain insight the low-temperature bonding...
Low temperature direct bonding technologies are now widely used for many applications. Mechanisms of some of these technics will be presented. The different way to obtain low temperature direct bonding will then be compared with their respective advantages and drawbacks.
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