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We fabricated a silicon-based three-dimensional photonic crystal nanocavity by micromanipulation technique, exhibiting a high quality factor of ∼14,500. Lasing oscillation with an InAs/GaAs quantum-dot layer inserted in the cavity was successfully demonstrated at 11K.
Stereoscopic high definition video is one of the promising next-generation video services because 3D video can express more life-like visual experiences. 3D video quality of experience is affected by the employed codec and video format. Therefore, we conducted extensive subjective assessments for side-by-side and frame-sequential video sequences using different codecs. In this paper, we first show...
Through-Silicon Vias (TSVs) enable high-density, low-latency, and low-power interconnects for system chips that consist of multiple dies. In “2.5D” Stacked ICs (2.5D-SICs), multiple dies without TSVs are stacked side-by-side on top of a passive silicon interposer base containing TSVs. In true 3D-SICs, multiple dies containing TSVs themselves are vertically stacked; one or multiple of such stacks are...
Integral imaging is an attractive auto-stereoscopic three dimensional (3D) technique for next generation 3DTV. To improve its video quality, new techniques are required to effectively compress the huge volume of integral image (II) data. In this paper, a new compression method implemented by multi-view video coding (MVC) is provided and used for sub-images (SI). SI is an alternative form of 2D image...
Three-dimensional technology offers greater device integration, reduced signal delay and reduced interconnect power. It also provides greater design flexibility by allowing heterogeneous integration. However, 3D technology exacerbates the on-chip thermal issues and increases packaging and cooling costs. In this work, a 3D thermal model of a stacked network-on-chip system is developed and thermal analysis...
The three-dimensional integrated circuits (3D ICs) offer performance advantages thanks to the increased bandwidth and reduced wire-length enabled by through-silicon-via structures (TSVs). Traditionally TSVs have been considered to improve the thermal conductivity in the vertical direction. However, the lateral thermal blockage effect becomes increasingly important for TSV via farms (a cluster of TSV...
To solve the problems in adjusting and controlling shapes of developable surfaces, a direct explicit and efficient methods of computer-aided design for developable surfaces with multiple local shape parameters are proposed. Firstly, a class of novel ei-B-spline basis functions with two shape parameters is presented. And then, following the important idea of duality between points and planes in 3D...
The current paper proposes a novel automated patient couch removal method on Computed Tomography (CT) images. Patient couch is often considered to be an unnecessary artifact especially when 3D rendered techniques are used. The method is based on measuring similarity between selected axial slices and the assumption that the bed object is constant on different slices. Due to the weight of the patient...
A three-dimensional (3D) PN junction capacitor for passive device integration (PDI) on silicon is discussed in this paper. The embedded capacitor with low parasitic inductor and high-reliability structure is a key technology for achieving effective micro-system integration for embedded passive technology and is widely used for a broad range of applications including filtering, tuning and power-bus...
Probably the most widely known more-than-Moore solutions is 3D chip stacking using TSV. The authors of this paper propose an equivalent circuit model of TSV and extract the values of passive elements within the model from full-wave scattering parameters simulation. Then, in order to estimate the signal distortion, the eye-diagram and TDR simulation are made and demonstrated. Additionally, transmission...
In this paper, the potential application of combining cylindrical TSV and annular TSV into 3D integration was studied. First, the schematic fabrication process of cylindrical and annular TSV was proposed. Lumped equivalent circuit model of these different kinds of TSV structures from the physical configuration were studied and verified. Besides, 3D full wave electromagnetic (EM) simulations of cylindrical...
This paper presents a novel fabrication method of through silicon vias (TSVs) based on suspended photoresist thin film. The AZ5214 photoresist thin film is self-assembled on the deionized (DI) water surface, then the film is transferred onto the wafer surface and patterned by photolithography to form the cover plates on the through-vias. After a Cu seed layer is deposited and the photoresist film...
A nanoprecision aligned wafer bonding is presented enabling creating innovative nanostructures. To achieve high-precision wafer bonding, a perfect alignment as well as room-temperature bonding process is necessary. In this paper, the limit of typical alignment methods is addressed firstly and a moire fringe assisted alignment method is developed to breakthrough the limit. Moreover, in order to realize...
Interests in advancing 3D design and integration have stimulated this study of connecting two different silicon dies using an organic interposer. This paper reports some of the challenges encountered by the system and silicon designers during the process of 3D integration. The discussion focuses on ways to improve the efficiency of the design flow, integration and verification of a 3D configuration...
TSV (Through Silicon Via) has been widely welcomed as an enabling technology for three-dimensional integration in a package with high density. The developing of a drilling method for TSVs with tapered sections by experimental methodology can be a tedious task. This paper reports on a advanced deep reactive ion etch process technology for the tapering of deep silicon vias which can be used in the fabrication...
As multiple layers of planar device are stacked to alleviate signal delay problem and reduce chip area, Through silicon via (TSV) is introduced to replace the large number of long interconnects needed in previous 2D structure. However, the thermal-mechanical reliability problems of TSVs, such as interfacial delamination, via cracking and so on, have become a serious reliability concern. In this paper,...
Since invention of ink-jet printing many new techniques and solutions to dose liquid media as drops have been developed. Today there are numerous drop on demand printheads for different fluids and applications. However characteristics of the fluid and working conditions have significant influence on the drop on demand printhead itself. Adapting a printhead to using other fluids often means extensive...
3D stacking and integration can provide significant system advantages. Following a brief technology review, this abstract explores application drivers, design and CAD for 3D ICs. The main 3D exploitation explored in detail is that of logic on memory. This application is explored in a specific DSP example, showing a 25% power advantage when implemented in 3D compared with 2D. Finally critical areas...
We study effects of interface traps (ITs) and random dopants (RDs) on 16-nm high-κ/metal gate MOSFETs. Totally random generated devices with 2D ITs at the HfO2/silicon oxide interface as well as 3D RDs inside the channel are simulated. Fluctuations of threshold voltage, on/off state current and gate capacitance of the tested devices are estimated and discussed. The results indicate the aforementioned...
The two bonds important in BCB bonding are discussed. According to the principles of silicon oxide bonding and the nature of these two bonds, we established the most likely mechanism for BCB to oxide bonding. We compare BCB to PECVD oxide bonding with BCB to thermal oxide bonding and investigate the difference in bonding strength. We also observe the BCB surface changes before and after bonding.
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