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The electronics test engineer is constantly challenged by a myriad of digital interfaces. Military, Space, Communications, and Automotive electronics all utilize both industry standard and custom digital interfaces. Many of these interfaces are supported with test instrumentation that is dedicated to a specific interface or alternatively, a cycle-based, general purpose digital I/O instrument may be...
During the last years, the installation of Distributed Energy Resources (DERs) and the expected diffusion of Electrical Vehicles (EVs), is increasing the complexity of the distribution grid, making the management of the grid operated by Distribution System Operators (DSOs) more difficult. The Smart Grid approach tries to provide a response to these troubles, by means of a strong interaction between...
Traffic anomaly detection is of premier importance for network administrators as anomalies have a dramatic impact on network performances, and QoS perceived by users. It is, however, a very time consuming and costly task that often requires decision from network and security experts. For making anomaly detection autonomous, many research works started investigating the use of unsupervised machine...
Accelerator-in-Switch (AiS) is a framework for building an accelerator logic tightly coupled with a switching hub in a single FPGA for high performance computation with heterogeneous environment with CPUs and GPUs. AiS is implemented on a partial reconfigurable region of an FPGA whose permanent region is used for a switching hub. A port of the switching hub is connected to the registers and local...
We present a framework for creating heterogeneous virtualized network function (VNF) service chains from cloud data center resources. Traditionally, these functions are packaged in software images within a catalog of networking applications that can be loaded onto a virtual machine CPU, and can be offered to users as a service. Our framework combines the best of both software and hardware by allowing...
The Locator/Identifier Separation Protocol (LISP) separates classical IP addresses into two categories: one for identifying terminals, the other for routing. To associate identifiers and locators LISP needs a specific mechanism, called mapping system. This technology is still at an early stage but two experimental platforms have already been deployed in the Internet: LISP Beta Network and LISP-Lab...
The architecture of the Microsoft Catapult II cloud places the accelerator (FPGA) as a bump-in-the-wire on the way to the network and thus promises a dramatic reduction in latency as layers of hardware and software are avoided. We demonstrate this capability with an implementation of the 3D FFT. Next we examine phased application elasticity, i.e., the use of a reduced set of nodes for some phases...
This paper explores the use of hardware sand-boxes, conceptually similar to software sandboxes, for secure integration of non-trusted IPs in systems-on-chip (SoC) designs. The goal of the hardware sandbox is to only allow permissible interactions between the IP and the rest of the system. The hardware sandbox design achieves this by exposing the IP interface to isolated virtual resources and checking...
FPGA is a promising candidate for the acceleration of Deep Neural Networks (DNN) with improved latency and energy consumption compared to CPU and GPU-based implementations. DNNs use sequences of layers of regular computation that are well suited for HLS-based design for FPGA. However, optimizing large neural networks under resource constraints is still a key challenge. HLS must manage on-chip computation,...
The run-pause-resume (RPR) debug methodology allows one to pause the normal circuit operations, observe the internal states of flip-flops and then resume the normal operations for further debug process. Data invalidation is a major problem that needs to be addressed when debugging a multiple-clock design with this methodology. This problem occurs when flip-flops in a receiving clock domain capture...
In-plane (IP) and out-of-plane (OOP) fiber waviness (sometimes referred to as marcelling and wrinkling, respectively) can occur in composite parts as a result of uneven thermal loading during curing, challenges in manufacturing complex geometry parts or other manufacturing variabilities. The changes in fiber orientations due to waviness can have an impact on the intended strength of the composite...
Multicast is widely deployed in data centers for point-to-multi-point communications. It has an established set of control protocols such as IGMP and PIM that has limitations around the lack of bandwidth awareness when establishing the multicast trees. This could leads to over-subscription of network links and packet loss impacting user quality of experience. Other existing multicast issues are around...
With recent advances and demands for data storage, new architectures for data controller chips are picking pace. Accordingly, the test methodologies for such chips are also becoming crucial since the large shipping volumes of those chips demand very few field returns. Along with the advances there is a need for a robust test strategy with some novel techniques which can be enabled to test the SOC...
Open source hardware projects are becoming more and more common. OpenRISC SOC, one of the prominent of these projects, has become quite popular with the support of volunteer developers. In this work, we have demonstrated the design of an DES (Data Encryption Standard) based system, that can be used in security applications, on ORPSoC-v2 (Openrisc Reference Platform System-on-Chip). Additionally, we...
In this paper, two different packet timing and IP ID based network steganography approaches have been proposed to provide confidential transmission of information. In the proposed packet timing approach, it is seen that the bandwidth is higher than the previous methods. The proposed IP ID field based approach has been found to be more effective than previous methods in ensuring the uniqueness of the...
The loT (Internet of things) is emerging as a wide variety of devices are attached to the Internet to support ubiquitous and pervasive sensing and computing, home automation, and the shift toward smart cities. As the IoT becomes a critical part of the Global Internet on which we increasingly rely, resilience is increasingly important. Of greatest concern is resilience to large-scale disasters that...
Solid tumor hypoxia is a poor outcome predictor for radiotherapy, chemotherapy and also surgical treatment options. Recently, oxygen microbubbles (OMB) have shown promise as an adjuvant therapy to relieve such tumor hypoxia. However, a key limiting factor remains the lack of available data in vivo of the dose-response and time-dynamics of this OMB-induced reoxygenation. Here we study the kinetics...
The trend in computing is towards the use of FPGAs to improve performance at reduced costs. An indication of this is the adoption of FPGAs for data centre and server application acceleration by notable technological giants like Microsoft, Amazon, and Baidu. The continued protection of Intellectual Properties (IPs) on the FPGA has thus become both more important and challenging. To facilitate IP security,...
Network-on-Chip (NoC) is a nascent approach for reducing the communication bottleneck of multicore System-on-Chip (SoC). As the number of cores are increasing on SoC due to high performance demand of the consumer electronics and processing systems like servers, the low power and low latency NoC is required. Topologies are one of the most important parts of a NoC design, with considering the performance...
Over the past two decades, implementing routing lookups in dedicated hardware has been accepted as an undisputable gold standard in core Internet routers due to ever increasing performance requirements and unabated global routing table growth. Several recent proposals depart from that line of thinking and suggest that software algorithms running on commodity multi-core CPUs might (again) become well...
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