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Process monitoring has a central role in the process industry to enhance productivity, efficiency, and safety, and to avoid expensive maintenance. In this paper, a statistical approach that exploit the advantages of multiscale PLS models (MSPLS) and those of a generalized likelihood ratio (GLR) test to better detect anomalies is proposed. Specifically, to consider the multivariate and multi-scale...
A statistical approach is proposed to detect parametric fault in linear and weakly non-linear analog circuits by mapping faults to a statistical metric, Bhattacharyya distance which is measured from the Probability Density Function (PDF) of the outputs. The non-Gaussian Auto-regressive (AR) model is used to estimate the PDF. To validate the proposed statistical approach, we have simulated two benchmark...
In the modern mixed-signal SoC design cycle, designers are frequently tasked with detecting and diagnosing behavioral discrepancies between design descriptions given at different levels of hierarchy, e.g. behavioral vs. transistor level descriptions or behavioral/transistor level descriptions vs. fabricated silicon. One problem is detection, to determine if behavioral differences between design descriptions...
In this paper, fast and reliable operation fault classification is carried out using energy of the detail coefficients of the phase signals. Daubechies 4 wavelet was chosen because of its success in detecting abrupt changes in power system signals. The MATLAB 7.10 version is used to generate the fault signals and verification the algorithm. A scheme is proposed for 220KV Karad to Miraj STATCOM connected...
We present a methodology for algorithmic generation of test signals for thedetection and diagnosis of a variety of short and open-circuit defects in analogcircuits. Prior algorithms have focused on test generation for known short oropen defect values. This places the burden of failure coverage on accurateanalysis of observed defects in known failed parts at high cost. In this work, we optimize the...
The testability of equipment has become the key factor affecting equipment availability, and detracts from readiness and mission success. To overcome the current problems associated with the analysis of equipment testability, such as non-comprehensive failure mode coverage, low fault detection rate, and low fault location accuracy, this paper presents a system testability modeling and analysis method...
With the ever-shrinking global geometries on a die and the concomitant rise in the complexity of interconnections in an on-chip network (NoC), the links used therein often suffer from various manufacturing defects such as shorts. These defects not only cause logical or functional errors but also give rise to various other system level failures such as duplication, misrouting, or dropping of a packet,...
A design optimization method based on dependency model is proposed for Built-in test design in Prognostics and Health Management. Firstly, simplify the dependency model, eliminate the redundant test and merge the fuzzy fault model. Secondly identify the minimum test vector matrix to each fault mode. Under the principles of reliability and costs, determine the optimal test vector, which is used as...
Test prioritization is an effective technique used to reduce the amount of work required to support regression testing in continuous integration development. It aims at finding an optimal order of tests that can detect regressions faster, potentially increasing the frequency of software releases. Prioritization techniques based on test execution history use the results of preceding executions to determine...
Multi-cycle scan-based tests allow more faults to be detected by keeping the circuit in functional mode for more than one clock cycle. Optimizing a multi-cycle test set can improve test quality and/or test application time. It is also possible to capture the primary outputs of a circuit multiple times between the scan operations. This ensures that if a fault is detected at the primary outputs, increasing...
Traditional bus-based systems-on-chip (SoCs) are turned to on-chip networks (NoCs) to overcome communication bottleneck. But, fabricating such NoC-based systems without any defect in interconnects or logics is a major challenge. This paper proposes a cost effective and scalable on-line test solution that detects and diagnoses intra-and inter-shorts in NoC interconnects. The proposed solution offers...
The process of testing any software system is an atrocious task which indeed consumes a ton of effort, and expensive also. Required effort and time to do adequate as well as effective testing get bigger, as the software gets more complexed that can lead to swarm over the project budget or some test cases left uncovered or delay in completion. A suitably generated test suite does not only locate errors...
In the early days of Systems Engineering, several methods were developed in industry to verify or validate designs, ensure that products could meet requirements and specifications, and later support those products. Those methods consisted of techniques and methodologies considered state-of-the-art at the time. Sometimes, those approaches could not resolve all issues. For that reason, newer methods...
This work presents an online testing scheme for detecting Single Missing Gate Faults (SMGF) in Exclusive-Or Sum of Product (ESOP) based reversible circuits consisting of both the positive and negative control MCT (Multiple control Toffoli) gates. In this technique, initially we transform an input function to its equivalent testable design, where some redundant gates and an ancillary line are appended...
Revolutionary changes in technology has brought a lots of different types of devices towards the Internet enabled services. It has become challenging to keep web sites functional and user friendly in a wide range of devices. Responsive Web Design (RWD) steps up to facilitate the necessary support to overcome those challenges with complex cascading style sheet (CSS) and JavaScript defined layouts....
Modern computer software usually consists of a number of interacting components. Defects pertaining to component interactions may not be visible until the components are integrated. To exercise component interactions, we propose an integration testing approach based on the core concept of contracts (i.e., preconditions and postconditions of component calls in first-order logic). To enable correctness...
Computer interlocking software is a real-time and safety-critical software, which can ensure the traveling safety and improve the transportation efficiency in the railway signal computer control systems. It is of great significance to evaluate the reliability of the interlocking software before putting them into operation. Most of the existing Non-Homogeneous Poisson Process (NHPP) models did not...
This paper presents a relaying algorithm based on Artificial Neural Network (ANN) technique for the protection of transmission line. A feed forward ANN with six inputs and eleven outputs has been developed for the detection and classification of faults. Data was generated by simulating a 400 kV, 50Hz, 100 km transmission line in PSCAD/EMTDC at a sampling frequency of 2 kHz. Three ANN configurations...
Software testing is a very crucial and important phase for (SDLC) software development life cycle. Software is being tested on its effectiveness for generating good quality software. Regression testing is done by considering the constraints of resources and in this phase optimization of test suite is very important and crucial. This paper mainly aims to make use of hybrid approach of meta-heuristics,...
Prioritization techniques have become an indispensable part of the software testing process. They are highly beneficial either due to resource or time constraints or when tester cannot execute the complete test set. Combinatorial test sets are generated with the aim to cover all the possible t-way interactions. In this paper, techniques to prioritize t-way test sets are studied. A comparative study...
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