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This paper introduces a work for localization of underwater acoustic source using two hydrophones. The work is for acoustic pinger-based transit task as a part of 2016 Maritime RobotX Challenge. The designed scheme calculates direction of arrival based on time difference of arrival. Calculation of the direction of arrival is conducted two times at two different positions. With the two direction of...
Recently, the increased utilization of outsourcing services for a part of designing VLSIs might reduce the reliability of VLSIs. There is a risk that hardware Trojan circuits are inserted into VLSIs by attackers at design phases. It is difficult to detect Trojan circuits by functional verification and testing. In this paper, we propose a hardware Trojan circuit detection method based on a pair of...
FTA (Fault Tree Analysis) is one of the most used methods for reliability analysis and to quantify the risks associated with the failures of systems. This method performs analysis of the combination of events that can lead to a critical system failure (called Top Event of the designed Fault Tree) and allows calculating the probability of failure. In this paper, has been built the Fault Tree for a...
For modern complex designs it is impossible to fully specify design behavior, and only feasible to verify functionally meaningful scenarios. Hardware Trojans modifying only unspecified functionality are not possible to detect using existing verification methodologies and Trojan detection strategies. We propose a detection methodology for these Trojans by 1) precisely defining “suspicious” unspecified...
Hardware Trojan detection has been the subject of many studies in the realm of hardware security in the recent years. The effectiveness of current techniques proposed for Trojan detection is limited by some factors, process variation noise being a major one. This paper introduces latch-based structures as a self-reference detection technique which uses in-circuit path delays as golden reference models...
This paper proposes an area efficient and low power Reed-Solomon (RS) decoder. The proposed decoder is designed using eight stage arithmetic pipelined architecture. The pipelined architecture of RS decoder performs the detection of error locator from the input stream and computes the error magnitude polynomial using the Berleykamp Massey's algorithm. The evaluation of error locator and computation...
Non-linear chaos is a property of equations, cauterized by non-periodicity, the high sensitivity to initial conditions and his control parameters, ability to reciprocal synchronization and unpredictability. The deterministic nature of the chaotic system can be used to generate a pseudorandom sequence for digital ciphering algorithms. This work presents a pseudo-random bit generator (PRBG), based on...
Secure hardware design is a challenging task due to the fact that security properties are difficult or impossible to model and subsequently verify using traditional hardware design tools. The "state of the art" for hardware design security relies heavily on functional verification, manual inspection, and code review to identify security vulnerabilities. This labor intensive process significantly...
The explicit features of wide band gap devices such as silicon carbide (SiC) and gallium nitride (GaN) propelled the relentless demand for higher power density and higher efficiency in enormous power-electronic applications. SiC-based power switches are adopted in solar inverter, electric traction and other automotive electrical subsystems due to their admirable characteristics compared with silicon...
The security and reliability of cryptosystems are endangered with natural occurring and malicious injected faults by leakage of the information. Efficient trade off among minimum performance and implementation metrics and high level of security for cryptosystems in constrained applications has led to proposed error detection schemes for lightweight block ciphers. These ciphers provide low-cost confidentiality...
Many design companies have gone fabless and rely on external fabrication facilities to produce chips due to increasing cost of semiconductor manufacturing. However, not all of these facilities can be considered trustworthy; some may inject hardware Trojans and jeopardize the security of the system. One common objective of hardware Trojans is to a establish side channel for data leakage. While extensive...
Accelerated network technologies are crucial for implementing packet processing in high-speed computer networks and therefore, network routers accelerated by field-programmable gate arrays (FPGAs) are becoming common. One of the time-critical jobs in routers is packet classification which requires rapid lookup in tables. Fast hash computation is a must in order to process the packets in time. Adaptive...
With the trend of outsourcing fabrication, split manufacturing is regarded as a promising way to both provide the high-end nodes in untrusted external foundries and protect the design from potential attackers. However, in this work, we show that split manufacturing is not inherently secure. A hardware trojan attacker can still discover necessary information with a simulated annealing based attack...
Traditionally, Hardware is considered as root of trust. Software generally builds on top of the hardware. By emerging Hardware Trojan attacks, this trust seems to be violated. Hardware Trojan is any addition or modification to a circuit or a system with malicious intention. Trojan can cause change or control over functionality in circuit or it may leak sensitive information from inside the chip and...
In the design of Systems-on-Chip and Embedded Systems measures for increasing their error resilience can benefit from a precise understanding of the effects that hardware (HW) faults may have on the execution of the system's software (SW). This is true in particular for low-level software components controlling the communication between the application software and the hardware, implementing important...
The transition from the classical energy grid to a smart grid implies the introduction of information and communication technologies. In recent years, research and industry worked on enabling smart grids by developing solutions to connect and integrate distributed energy systems. Even though these efforts have made significant progress, a main issue relates to the costs of additional technical solutions...
As RF environments become more complex from both targeted attacks and challenging RF propagation environments (e.g. urban), pre-planned placement of deployed communications elements becomes arduous for the network planner supporting the digital battlefield. We propose a novel dynamic range extension approach that builds upon our extant planning and optimisation tool, HARLEQUIN, to automatically and...
BIST based field testing is a promising way to guarantee the functional safety of intelligent and autonomous systems. To improve the fault coverage with less random patterns for BIST, sequentially observing some flip-flops(FFs) during multi-cycle test is useful. In this paper, we propose the methodology for selecting the Fault-Detection-Strengthened FFs in multi-cycle test by evaluating the structure...
Stochastic computing using simple logic circuits requires significantly less area and consumes less power compared to traditional computing systems. These circuits are also inherently fault-tolerant. The main drawbacks of these systems include long latency and inexactness in computing. The deviation from exact values increases as the correlation among inputs increases. In many applications, outputs...
Memristors are non-volatile memory elements. In applications like mem-computing, where memory acts both as a site for storing data and logic computations, memristors provide promising future. In this paper, the design of adders implemented with memristors is discussed. Memristor based designs for standard fixed point adder architectures (ripple carry adder, carry look-ahead adder and parallel prefix...
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