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Accelerated architectures such as GPUs (Graphics Processing Units) and MICs (Many Integrated Cores) have been proven to increase the performance of many algorithms compared to their CPU counterparts and are widely available in local, campus-wide and national infrastructures, however, their utilization is not following the same pace as their deployment. Reasons for the underutilization lay partly on...
Agent based Library Recommender System is proposed with the objective to provide effective and intelligent use of library resources such as finding right book/s, relevant research journal papers and articles. The architecture consists of profile agent and library recommender agent. The main task of Library recommender agent is filtering and providing recommendations. Library resources include book...
In order to better make investment decisions for future space processing, we are equipping an architectures laboratory to investigate the power and computing performance of candidate computing architectures for future space applications. The picture for future space processing is increasingly complicated by ever increasing data rates/sizes and limited communications bandwidth, both of which will require...
With the widespread use of distributed version control systems for software development, many software development projects are being shared and managed in a Web environment. This allows many developers, including project leaders and supporters, those who write important functions, those who resolve bugs and errors, and those who provide fundamental source code to relieve bottlenecks, to collaboratively...
We have developed a radiation-hardened standard cell library for space applications based on the commercial 65nm CMOS technology process. The standard cells are designed using some radiation-hardened (RH) techniques, and the effects of these RH approaches have been validated. Also this 65nm CMOS RH standard cell library has been characterized to support the verilog to GDSII design flow, and the designed...
In this paper we present a novel approach for functional-style programming of distributed-memory clusters, targeting data-centric applications. The programming model proposed is purely sequential, SPMD-free and based on high-level functional features introduced since C++11 specification. Additionally, we propose a novel cluster-as-accelerator design principle. In this scheme, cluster nodes act as...
Modern high performance cluster systems for parallel processing are employing multi-core processors and high speed interconnection networks. Efficient mapping of the processes of a parallel application onto cores of such a cluster system, plays a vital role in improving the performance of that application. Parallel application can be modelled as a weighted graph showing the communication among the...
In this paper we present a novel approach for functional-style programming of distributed-memory clusters, targeting data-centric applications. The programming model proposed is purely sequential, SPMD-free and based on high-level functional features introduced since C++11 specification. Additionally, we propose a novel cluster-as-accelerator design principle. In this scheme, cluster nodes act as...
Convolutional Neural Networks (CNNs) have substantially advanced the state-of-the-art accuracies of object recognition, which is the core function of a myriad of modern multimedia processing techniques such as image/video processing, speech recognition, and natural language processing. GPU-based accelerators gained increasing attention because a large amount of highly parallel neurons in CNN naturally...
Graphic processing units (GPUs) is widely used to accelerate the processing speed of the radar detection procedure, including the range compression, coherent integration and constant false alarm rate. Specifically, detailed parallel design of the radar algorithm and the thread programming are shown. The experimental results show that, by engaging the parallel technology into the radar processing procedure,...
The security situation of the Internet of Things (IoT) is constantly changing. Traditional passive management strategies for IoT can not adapt to the complicated environment of IoT. To solve the above problem, a dynamic defense architecture for the security of IoT is proposed. It is made up of six security defense segments which include active defense, threat detection, security warning, security...
Modern platform FPGAs are sufficiently dense to allow the assembly of a complete chip heterogeneous multiprocessor systems on chip (CHMPs) within a single die. Based on CHMP, every research group that sets out to explore how an application can be accelerated on an FPGA platform must firstly integrate processors, buses, memories, and support IP components into a base architecture prior to beginning...
This article posits tamper-resistance as a necessary security measure for cyber-physical systems (CPS). With omnipresent connectivity and pervasive use of mobile devices, software security alone is arguably not sufficient to safeguard sensitive digital information we use everyday. As a result, utilization of a variety of tamper-resistant devices -- including smartcards, secure digital cards with integrated...
Cryptosystems play a vital role in cyber security. To accelerate their big integer operations without jeopardizing the security level has become one of the main objectives of the cryptography research. However, popular big integer libraries highly optimized for CPU and GPGPU perform poorly on the emerging Intel Xeon Phi coprocessor mainly because they cannot take advantage of the 512-bit Single Instruction...
Autotuning is an empirical optimization approach in which the configuration space of an algorithmic code is explored in a systematic manner for a variety of software and hardware parameters. The objective of such autotuning is to reduce the computational time and/or energy requirements of the generated code. We develop a genetic algorithm based autotuning strategy that can be used for optimizing performance...
In this paper, we present cuLib, a R package that provides an easy-to-access interface for utilizing the computing power of NVIDIA GPU. The cuLib package aims to make GPU-based parallel programming easier, flexible and high-performance. It allows the use of GPU computing in R without further knowledge because the syntax for definition and manipulation of GPU data is similar to formal R language. cuLib...
With the rapid proliferation of information technology, researchers have access to large archives of scientific articles. This makes it more challenging to find articles of interest for researchers. Consequently, a solution to this problem, scientific article recommendation, has become a hot research topic in recent years. In this paper, we propose a novel article recommendation method called Citation-based...
With continued technology scaling and increased power and thermal densities, processor operation and performance are increasingly dominated by physical phenomena. Microarchitectural approaches to mitigate these effects must be based on a profound understanding of how the physics is manifested in microarchitectural executions and system-level properties, such as performance, energy efficiency, or lifetime...
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