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Debugging hardware has always been difficult when compared to debugging software, in large part due to a lack of convenient visibility. This paper describes the open NIFD framework that provides software-like debugging facilities to both pure FPGA and hybrid FPGA/software platforms, allowing a designer to treat the hardware logic like a specialized remote software debug target. NIFD provides features...
Configurable hardware is becoming increasingly powerful and less expensive. This allows embedded system developers to exploit hardware parallelism in order to improve real time properties and energy efficiency. However, hardware design, even if performed using high-level hardware description languages, is error-prone and time consuming, especially when designing complex heterogeneous multiprocessor...
Technological advances of Field Programmable Gate Array (FPGA) are making that this technology becomes the most preferred platform for the rapid prototyping of highly integrated digital systems. In addition, protection of processor-based systems to mitigate the harmful effects of radiation-induced upset events is gaining importance while technology shrinks. In this context, the main contribution of...
Measuring reliability of embedded systems is an important but non-trivial problem. In a system design process, it is desirable to have early indicators for the reliability of an embedded system. Such reliability measurement will typically be carried out on system prototypes. The reliability measurements should thus be easy in set up, flexible to system changes, and hopefully low in cost. In the paper...
The ITER tokamak (Latin for “the way”) is the next step toward the realization of electricity-producing fusion power plants, since it has been designed to reach the plasma burning condition. The Central Safety System for Nuclear Risk (CSS) is the control system in charge to assure nuclear safety for the ITER plant, the personnel, and the environment. Since the CSS is a critical safety system, its...
Utilizing high level hardware description languages for the creation of customized circuits facilitates the rapid development and deployment of new hardware. While hardware design languages increase the speed at which hardware can be developed, creating hardware designs that are both efficient in resource usage and processing speed can be time consuming and require much experience. This problem is...
This demonstration presents an integrated environment that translates a CAL-based dataflow specification [1] into a heterogeneous implementation, composed by HDL and C codes. The demonstration focuses on the capability of the co-design environment to automatically build an executable heterogeneous system implementation running on a platform composed of a processor and a FPGA from the annotation of...
In this paper, we present a prototyping exercise, mapping a turbo decoder high-level description directly to FPGA for fast simulation of a software radio. The turbo decoder algorithm is described in C programming language and the mapping has been done directly using the high level synthesis tool CoDeveloper. The manual transformations made on the code to facilitate efficient compilation and to achieve...
This paper deals with the automatic translation of interpreted generalized Petri Nets with time into VHDL, for rapid prototyping on programmable logic device purposes. This approach is based on the component orientation of the VHDL language, and defines two elementary VHDL components: the place and the transition. This transition component is a "pivot" element of the approach, since it supports...
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