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There is a demand to further improve upon performance parameter of particle detectors for high luminosity applications. Higher breakdown voltage, larger signal, lower leakage current and low noise is the primary requirement for future detectors. We want systematic study and investigate one of the important parameters namely the breakdown voltage and want to achieve optimum result for future detectors...
This paper presents RF-MEMS test vehicles: Single-Pole Single-Throw (SPST), Single-Pole Double-Throw (SPDT) switches and high-voltage generators integrated with SPST switches that are designed and fabricated in IHP's 0.25 μm SiGe BiCMOS technology for K-band (18–27 GHz) space applications. All the fabricated RF-MEMS test vehicles are packaged by a wafer-to-wafer packaging technique. The fabricated...
To compare Si and poly-SiGe as MEMS structural materials having 20 pm-thick, we fabricated a capacitive accelerometer on an 8-inch Si substrate using CMOS standard process and measured capacitance sensitivities of an identical sensor design. As a result, we found that the sensitivity of the SiGe sensor is 2.1 times larger than that of the Si sensor. We also confirmed that the SiGe sensor can attain...
Recent research progresses on dopant diffusion and segregation, Si-Ge interdiffusion and defect engineering in SiGe material systems are reviewed, which are relevant to SiGe-based semiconductor devices including SiGe PNP hetero-junction bipolar transistors, metal-oxide-semiconductor field-effect transistors, and Ge-on-Si lasers. Experiment data and continuum modeling are discussed.
Almost all electronic circuits require a reference, be it voltage, current, or time. A well-designed reference is expected to provide a “stable” point that will be independent of the potential variations in its operating conditions. While there has been decades of extensive amount of creative work in the world of reference design, with the emergence of new applications, reference designers are now...
This paper describes two approaches to increase the energy efficiency of on-chip terahertz (THz) integrated circuits and systems. First, we present designs of multi-functional electromagnetic structures that utilize mode orthogonality and near-field interference to achieve simultaneous oscillation, harmonic generation, signal filtering and radiation. This leads to ultracompact THz circuits with low...
A 3-Dimensional (3D) strained Silicon Nanowire MOSFET simulation and inversion charge model are presented. The simulation studies are conducted based on electrical parameters of nanowires such as current and threshold voltage using a ATLAS TCAD simulator. The inversion charge model with Germanium fraction is formulated using a unified charge model. These characterization studies are performed to investigate...
A fully-electronic high-speed transmission with a highly-integrated set of quadrature direct-conversion TX and RX modules in 130nm SiGe HBT technology operating in the 240 GHz transmission window is presented. In view of high packaging costs of the currently available THz communication front-ends, each of the modules is implemented as a single chip with a broadband silicon lens-integrated on-chip...
We developed a high speed and high efficiency of depletion type Si optical modulator (Si-MOD) with a pn junction by applying a p-type-doped strained SiGe layer which was stacked on the lateral pn junction type Si-MOD. We designed the optimum Si-MOD structure and demonstrated a high modulation efficiency of 1.0 Vcm, which is about 50% more efficient than that of Si-MOD with a lateral pn junction. We...
In this paper, we mainly focused on analyzing the thermoelectric property i.e. figure of merit of different nanostructured materials in room temperature (300–310 K). Here we studied the transition-metal dichalcogenides, particularly Molybdenum Disulfide (MoS2); Metal Oxides, specifically Zinc Oxide (ZnO); and conventional semiconductor materials, i.e. n-type and p-type Silicon (Si) and Silicon Germanium...
In this paper, we report the simulation of high doping nanoscale heterojunction diode, particularly Si1−xGex/Si p-n diode, using Cogenda Visual TCAD. In order to gain knowledge on electrical properties of this diode, we exhaustively simulate the effect of Ge mole fraction in SiGe material on current, voltage and electric field characteristics. The simulation covers Ge mole fraction of 0.2 to 0.7 in...
In this presentation we will demonstrate how it is possible to compute properties of Sii-xGex alloys, using modern first-principles approaches which provide values for the band gaps in the entire range 0 ≤ x ≤ 1, as well as effective masses for Si and Ge (also when strain is applied) which all are in excellent agreement with experiments. These benchmarks show that appropriately chosen DFT methods...
Photonic-electronic integration is a key technology to master data traffic growth and therefore an enabler of future network technologies. For some time now, a novel silicon-based photonic-electronic integration technology, photonic BiCMOS, is under development at IHP. Photonic BiCMOS is a planar technology co-integrating monolithically on a single substrate high-speed RF frontend electronics - by...
We have successfully exploited multi-dimensional spaces of concentrations of the interstitial species, Si and Ge, geometries and compositions of the starting SiGe nano-pillar, and sources of Si interstitials (the Si3N4 and Si encapsulation layers) to create new classes of exciting optical and electronic devices such as single-electron tunneling devices, wavelength-tunable photodetectors, and MOSFETs.
Starting with its 50th anniversary in 1992, I have seen 25 years of electron and photon device research at the DRC; let us look over this history and then guess at the future.
We demonstrate scaled high-Ge-content (HGC) strained SiGe pMOS FinFETs with very high short channel (SC) performance using a Replacement High-K/Metal Gate (RMG) flow, for the first time. A novel RMG gate stack process was introduced to create Ge-free interface-layer (IL) with excellent reliability and sub-threshold swing (SS) as low as 62mV/dec, the best reported to date for Si-cap-free SiGe FinFETs...
This paper is devoted to an analysis of modern cryogenic low noise amplifier designs in integrated implementation. An analytical comparison between two modern semiconductor technologies InP HEMT η SiGe HBT, used for design and manufacture of cryogenic low noise amplifiers with advanced low noise parameters is presented is presented.
The aggressive scaling of semiconductor technologies with each node generates several opportunities for ion implantation solutions to address key scaling challenges (device performance, SCE, leakage, variability, reliability, etc.). Optimization of ion implantation and integration with annealing and other processes is providing pathways for incorporating new materials and device architectures for...
Due to scaling of traditional MOS devices into nanometer range, the constraints like power and performance restrict its lastingness in future circuit design. The trigate FinFET has emanated as propitious device for better electrostatic characteristics in terms of Short Channel Effects (SCEs) etc. In this work, the design and analysis of 5-fin SOI FinFET at 20nm technology has been done using 3 Dimensional...
Epitaxially grown SiGe and Ge layers on Si <100> substrate have been analyzed by terahertz multispectral reconstructive 3D imaging technique. In particular, 3D images of both samples were generated via a non-contact and no-destructive route and were analyzed by utilizing the terahertz reconstructive imaging algorithm. It was found that the algorithm of “gridding with inverse distance to power...
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