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This work proposes a decoder implementation for high-rate generalized concatenated (GC) codes. The proposed codes are well suited for error correction in flash memories for high reliability data storage. The GC codes are constructed from inner extended binary Bose-Chaudhuri-Hocquenghem (BCH) codes and outer Reed-Solomon (RS) codes. The extended BCH codes enable high-rate GC codes. Moreover, the decoder...
LDPC codes are a family of error correcting codes used in most modern digital communication standards even in future 3GPP 5G standard. Thanks to their high processing power and their parallelization capabilities, prevailing multi-core and many-core devices facilitate real-time implementations of digital communication systems, which were previously implemented on dedicated hardware targets. Through...
This paper reports low bit-error-rate (BER) polar codes concatenated low density parity check (LDPC) codes for wireless communication systems. The LDPC code has been validated on the error correction capable to approaching the theoretical value. However, the BER performance of this code is still limited because of the effect of the error floor. Therefore, a concatenated coding scheme based on polar...
Transmission techniques based on channel coding with feedback are proposed in this paper to enhance the security of wireless communications systems at the physical layer. Reliable and secure transmission over an additive noise Gaussian wiretap channel is investigated using Bose-Chaudhuri-Hocquenghem (BCH) and Low-Density Parity-Check (LDPC) channel codes. A hybrid automatic repeat-request (HARQ) protocol...
In this paper, compact memory strategies for partially parallel Quasi-cyclic LDPC (QC-LDPC) decoder architecture are proposed. By compacting several adjacent rows hard decisions and extrinsic messages into one memory entry, which not only reduces the number of memory banks for hard decisions, but also facilitates multiple data accesses per clock cycle, the throughput of the decoder is increased. We...
This paper focuses on low complexity architectures for check node processing in Non-Binary LDPC decoders. To be specific, we focus on Extended Min-Sum decoders and consider the state-of-the-art Forward-Backward and Syndrome-Based approaches. We recall the presorting technique that allows for significant complexity reduction at the Elementary Check Node level. The Extended-Forward architecture is then...
Sparse code multiple access (SCMA) is a promising non-orthogonal multiple access scheme to support massive connectivity. In this paper, we propose a novel scheme to analyze the performance of Low-density Parity-check (LDPC) codes in SCMA systems based on density evolution (DE) theory. In particular, we develop the combination method including channel adapter and log-likelihood ratio (LLR) convertor...
A universal design methodology for inter-leavers in bit-interleaved coded modulation (BICM) systems deploying binary irregular quasi-cyclic low-density parity-check (QC-LDPC) codes and higher-order modulation is presented. The interleaver is introduced to lower decoding threshold when higher-order modulation is adopted. For this purpose, an optimization procedure with modified numerical analysis as...
In this letter, protograph based quasi-cyclic (QC) low-density parity-check (LDPC) codes are designed for multi-level cell (MLC) NAND flash memories, where the exact voltage signal values are unavailable but rather the quantized voltage signals are measured for soft decoding. Existing LDPC codes optimized for symmetric, additive white Gaussian noise (AWGN)-like channels are not optimal for flash memory...
3D QLC (Quad-Level-Cell) NAND technology with 16 voltage levels per cell will be one of the next generation memory technologies after 3D TLC (Triple Level Cell) NAND flash succeeded. Besides, program algorithm for 16 voltage levels is studied in this paper, the important read algorithms are investigated because the data errors of QLC device will be easily generated due to power loss, program distribute,...
In a binary input additive white Gaussian noise (BIAWGN) channel, belief propagation (BP) decoding for luby transform (LT) codes requires the knowledge of the signal-to-noise ratio (SNR) at the receiver to achieve its optimal performance. An erroneous estimation of the SNR at the decoder is referred to as “SNR mismatch”. SNR mismatch can significantly degrade the BP decoding performance of LT codes...
In this paper, we propose an algebraic approach to design extremely low rate low-density parity-check (LDPC) codes by employing the primitive polynomials. We first investigate the requirements for the polynomials to construct 4-cycle free LDPC codes and then propose an algebraic approach to design the parity check matrix. To achieve a better decoding performance in the extremely low rate region, we...
In this paper we study the initialization step of decoding algorithms for efficient error-control coding techniques, and its dependence of the channel characteristics over which transmission is performed. LDPC and Polar codes are selected as efficient error-control codes operating over different channels. Channels under study are the classic Additive White Gaussian noise channel, the Rayleigh fading...
For practical applications in forward error correction, the importance of a systematic codeword cannot be overemphasized. Thus, this paper proposes the construction of a systematic quasi-cyclic (QC) LDPC code. This systematic structure is achieved by a row reduction technique different from the conventional Gaussian elimination method. This row reduction technique has the advantage of being easier...
Article justifies a term of “assessment of infrmation efficiency of error-correcting codes”. It describes a model of descrete communication channel with parameters, which are nessesary for assessment of information efficiency. Authors provide a methodology of comprehensive assessment of information efficiency based on Varshamov-Gilbert, Plotkin and Shannon bounds. Made an assessment of information...
This paper proposes a modified bit flipping algorithm and its weighted variants based on reliability derived from intrinsic information. Compared to other existing algorithms where extrinsic information based reliability was used in the flipping function, here intrinsic information based reliability is also equally considered. This algorithm only uses additions and subtractions to modify reliability...
In contemporary digital communications design, two major challenges should be addressed: adaptability and flexibility. The system should be capable of flexible and efficient use of all available spectrums and should be adaptable to provide efficient support for the diverse set of service characteristics. These needs imply the necessity of limit-achieving and flexible channel coding techniques, to...
In this paper, the BER performance of a soft distance successive cancellation decoder for Polar codes is analyzed in the presence of impulsive noise, modelled using both the Middleton's Class A model and the symmetric alpha-stable model, for impulsive noise channels. This algorithm avoids estimation of the signal-to-noise ratio of the channel, and simplifies the initialization step of the classic...
A node-wise (NS) schedule has been recently proposed for decoding LDPC codes with the linear programming (LP) decoding approach, based on the alternate direction method of multipliers (ADMM). It improves the error correction performances as well as the convergence speed of the ADMM-LP decoder. However, it suffers from a high computational complexity resulted from residuals calculation. In this paper,...
Increasing soft error rate and decreasing technological nodes sizes pave a way for Error Correcting Codes (ECC) widespread use in embedded systems. Depending on application safety goals and acceptable performance and area overhead, different codes can be selected. The goal of this paper is to investigate the efficiency and expediency of two of the most prominent ECC codes, Hamming and Hsiao, in the...
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