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CPU-FPGA heterogeneous platforms offer a promising solution for high-performance and energy-efficient computing systems by providing specialized accelerators with post-silicon reconfigurability. To unleash the power of FPGA, however, the programmability gap has to be filled so that applications specified in high-level programming languages can be efficiently mapped and scheduled on FPGA. The above...
The lack of technical equipment is one of the hurdles in facing challenges in engineering education and basic research for universities in developing countries. In this paper we present a low-cost laboratory mostly based on commercial off-the-shelf wifi routers. A basic workbench is made out of three second hand wireless routers. Our local market provided plenty of used D-Link DIR-300. Total cost...
Operating Systems (OSs) have an important position in the Computer Science curriculum. When students face this subject, they study core concepts, mechanisms and strategies that apply to several fields. To support practical lectures in an OSs course, instructors may adopt an OS on which students can work, exercising their knowledge and enhancing their practical skills. In this context, we present Nanvix,...
With the fast increasingly use of image and video processing in many aspects, the requirements for high performance and high-quality systems lead to the use of reconfigurable computing to accelerate traditional image processing platforms. In this work, an efficient runtime adaptable floating-point Gaussian filtering core is proposed to achieve not only high performance and quality but also kernel...
A configurable neuro-inspired inference processor is designed as an array of neurons each operating in an independent clock domain. The processor implements a recurrent network using efficient sparse convolutions with zero-patch skipping for feedforward operations, and sparse spike-driven reconstruction for feedback operations. A globally asynchronous locally synchronous structure enables scalable...
Support Vector Machines (SVMs) are supervised learning models of the machine learning field whose performance strongly depended on its hyperparameters. The Bio-inspired Optimization Tool for SVM (BIOTS) tool is based on a Multi-Objective Particle Swarm Algorithm (MOPSO) to tune hyperparameters of SVMs. In this work, BIOTS is proposed along with a custom hardware design generator (VHDL) that implements...
With the rapid advances in IoT technologies, the role of IoT gateways becomes even more important. Therefore, improving the reliability, availability and serviceability (RAS) of IoT gateways is crucial. Nowadays, Linux is widely adopted for core enterprise systems not only because it is a free operating system but also because it offers advantages in regards to operational stability. With many Linux...
In this paper, we propose a 2-D grouping FIFO based FFT hardware architecture, supporting 36 different FFT sizes defined in 3GPP-LTE systems. Also, the important design foundation is to develop a hybrid-radix computing kernel engine, including 4 configuration types. In a design implementation via TSMC 90-nm CMOS technology, the reconfigurable FFT chip only has a core area occupation of 1.51 mm2, dissipating...
Network virtualization offers flexibility by decoupling virtual network from the underlying physical network. Software-Defined Network (SDN) could utilize the virtual network. For example, in Software-Defined Networks, the entire network can be run on commodity hardware and operating systems that use virtual elements. However, this could present new challenges of data plane performance. In this paper,...
Modern computer systems are accelerator-rich, equipped with many types of hardware accelerators to speed up computation. For example, graphics processing units (GPUs) are a type of accelerators that are widely employed to accelerate parallel workloads. In order to well utilize different accelerators to gain better execution time speedup or reduce total energy consumption, many scheduling algorithms...
This study proposes a system-on-a-chip, field-programmable gate array (FPGA)-based real-time video processing platform for human action recognition. We provide the details of a hardware implementation for real-time human activity recognition in 3D scenes, including capture, processing, and display. The proposed platform is implemented by adding a two-stage preprocessing step to improve the results...
Modern operating systems (OSs) consist of numerous interacting components, many of which are developed and maintained independently of one another. In monolithic systems, the boundaries of and interfaces between such components are not strictly enforced at runtime. Therefore, faults in individual components may directly affect other parts of the system in various ways. Software fault injection (SFI)...
In today's cloud centred business environment, security of cloud solutions is a critical issue. Since virtualization is the foundational element of cloud computing and helps to achieve the benefits of cloud computing, security from virtualization becomes a major goal for the cloud based systems. Virtualization aims to create virtual versions of resources such as processors, memory, storage, network...
In a convolutional neural network (CNN), convolution calculation can account for about 90% of the total processing work. This paper presents the design of a convolution hardware accelerator (CHA) which can support efficient matrix multiplication to speed up the convolution calculation. In our experiment, when a RISC-V Rocket processor is used to simulate the operation of a CNN for image classification,...
This paper describes the design and implementation of a remote brush direct-current(DC) motor speed control platform based on WiFi. The platform consists of ARM11, Moter Driver Circuit(L298N), DC, Encoder and Speed Meter, ARM11 is equipped with the Linux and selected as the main processor to realize remote control and feedback of the motor's speed in WiFi environment. And then this article uses the...
FPGAs are becoming an attractive choice as a heterogeneous computing unit for scientific computing because FPGA vendors are adding floating-point-optimized architectures to their product lines. Additionally, high-level synthesis (HLS) tools such as Altera OpenCL SDK are emerging, which could potentially break the FPGA programming wall and provide a streamlined flow for domain experts in scientific...
In recent years, 3-dimension convolutional neural networks (3D CNNs) have been widely used for video analysis, 3-dimension geometric data and medical image diagnosis. While conventional CNNs are computationally intensive, 3D CNNs push the computational requirements into another level, since each computation depends on multiple image frames. This paper describes a novel hardware architecture for a...
FPGA-based accelerators are becoming first class citizens in data centers. Adding FPGAs in data centers can lead to higher compute densities with improved energy efficiency for latency critical workloads, such as financial applications. However FPGA deployment in datacenters brings difficulties both to application developers, and cloud providers. Application writers need to deal with the interfacing...
Field-Programmable Gate Arrays (FPGAs) are gaining considerable momentum in mainstream high-performance systems in recent years due to their flexibility and low power consumption. Still, FPGAs remain largely unavailable to software programmers due to programming and debugging difficulties that are inherent to standard Hardware Description Languages. The performance that hardware-oblivious software...
With the help of parallelism provided by the fine-grained architecture, hardware accelerators on Field Programmable Gate Arrays (FPGAs) can significantly improve the performance of many applications. However, designers are typically required to have excellent hardware programming skills and unique optimization techniques to fully explore the potential of FPGA resources. In this work, we propose the...
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