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In this paper, we present high performance 0.25mum gate-length self-aligned AIGaN/GaN HEMTs on 6H-SiC substrates using a single ohmic step. Our recently developed Mo/Al/Mo/Au-based ohmic contact requiring annealing temperatures between annealing temperatures 500 and 600degC was utilized. Ohmic contact resistances between 0.3 - 0.5 ohm-mm have been achieved.
In this paper, a report on high PAE, high breakdown-voltage HEMTs grown by ammonia MBE is discussed. First, an AlN nucleation layer was grown by plasma-assisted MBE on SiC. Then GaN buffer was grown by ammonia MBE, followed by 30 nm ammonia Al0.3Ga0.7N. A sheet charge of 1x1013 cm-2 with a mobility of 1500 cm2V-1s-1 was obtained from Hall measurements.
The paper reports on the characteristics of N-face AlGaN/GaN/AlGaN HEMTs. Ohmic contact optmization experiments based on the Ti/Al/Ni/Au metallization scheme commonly used for Ga-face AlGaN/GaN HEMTs were carried out and a low contact resistance of 1.3 Ohm/mm was achieved. The devices were then characterized before and after SiN passivation. Before passivation, large current dispersion was observed...
The influence of silicon nitride passivation on electron mobility of InGaAs/InP composite channel high electron mobility transistor structures has been studied. An increase in effective mobility mue with a negligible change of sheet carrier density ns after SiN deposition is clearly observed. Our results suggest that the enhancement of mue could be explained under the framework of electrons transfer...
In conclusion, we demonstrated AlGaN/GaN HFETs with fT=163 GHz and fmax=184 GHz by using thin, high-Al-composition barrier layers, Cat-CVD SiN gate-insulating and passivation layers, and 60-nm T-gates defined by EB lithography
This work reports on the development and fabrication of high electron mobility transistors with a gate length of less than 30 nm. The T-shaped gates were realized using a two-stage "bi-lithography" process that creates a T-shaped image in a bi-layer of PMMA and UVIII. This is then transferred into SiO2 gate support layer by a low damage dry-etch process. This method enables the fabrication...
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