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This paper presents a design approach for the output matching networks (OMN) required in continuous class B/J power amplifiers (PA). Design equations of the OMN are derived and used to design a class-B/J PA that covers the frequency band from 2.2 GHz to 3.45 GHz. The PA uses the LDMOS device available in the 130 nm SOI technology from STMicroelectronics. Simulation results show that the PA has an...
This paper discusses design of in-package reactances that can optimize efficiency of power amplifier transistors by specific and well-defined harmonic terminations and pre-matching within the device package. The methodology uses a passive fundamental-only load-pull tuner to characterize the transistor. As an example, the method is applied to a 10-W Infineon LDMOS device at a fundamental frequency...
This paper discusses the effects of combining structures on the RF and thermal performance of LDMOS high power amplifiers under mismatch conditions. Using a high gamma tuner, a typical power amplifier module is measured in terms of power and temperature in mismatch. Based on these measurements, the advantages and disadvantages of in-phase and balanced combining topologies are shown in the context...
In this paper, a wideband asymmetric Doherty power amplifier (WADPA), which has different LDMOS devices for the carrier and the peaking power amplifiers(MRF7S19080 and MRF8S19140), is designed with the stepped impedance transformer. The carrier and peaking amplifiers of the proposed Doherty amplifier operates in class-AB (2.76V) and class-C (1.3V) bias conditions, respectively, with a drain voltage...
This paper proposes a 450–470 MHz high efficiency three-stage Doherty power amplifier for IMT-Advanced system. The input matching and output matching are achieved by utilizing microstrip line and lumped-parameter components. Two 3dB couplers are utilized to carry out uneven input power dividing so as to omit the two quarter-wave lines which are usually located before the main amplifier and the second...
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