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Multiple gate MOSFETs (MuGFET) have gained significant attention as the scaling of the conventional MOSFET comes to an end. Of the possible architectures, the gate-all-around nanowire (NW) transistor offers the best gate control over the channel. In order to model GAA nanowire devices for channel lengths less than 10nm, while preserving a connection to the drift-diffusion framework familiar to device...
The Wigner Monte Carlo approach is shown to provide an efficient way to study quantum transport in the presence of scattering and to connect semi-classical to quantum transport. The study of resonant tunneling diodes highlights the physics of the impact of scattering on resonant tunneling, and on electron decoherence and localization. The simulation of nano-MOSFET evidences a mixed regime, where both...
The paper presents a detailed study on the idle leakage reduction techniques on partially depleted silicon-on-insulator (PD-SOI) CMOS SRAM. The most promising leakage reduction techniques that have been proposed are introduced, analyzed and compared into 65 nm low-power PD-SOI technology, taking into account all the SOI specific effect. Especially, it is shown that the leakage reduction techniques...
The dramatic increase in leakage current, coupled with the swell in process variability in nano-scaled CMOS technologies, has become a major issue for future IC design. Moreover, due to the spread of leakage power values, leakage variability cannot be neglected anymore. In this work an accurate analytic estimation and modeling methodology has been developed for logic gates leakage under statistical...
Reliabilities of high-k stacked gate dielectrics are discussed from the viewpoint of the impact of initial traps in high-k layer. TDDB reliability can be explained by the generated subordinate carrier injection (GSCI) model. While initial traps increase the leakage current, they do not degrade the TDDB reliability. In contrast, the BTI reliability is strongly degraded by initial traps.
Plasma-exposed Si surface related to Si recess in source/drain region was investigated in detail for various superposed bias configurations with frequencies of 13.56 MHz and 400 kHz. Two different bias powers were utilized by an inductively coupled plasma reactor (ICP). The surface layer (SL) and the interfacial layer between the SL and Si substrate (IL) were analyzed by spectroscopic ellipsometry...
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