The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Vedic maths based multiplier is a novel and high speed multiplier. Adder is one of the main components used in this technique. Using fast adder will enhance the overall performance of the Vedic multiplier. In this work, comparative analysis is done using different adder architectures in Synopsis Design Compiler with different standard cell libraries at 32/28 nm. Various Adder topologies like Ripple...
Arithmetic adder is the most important basic element for many digital applications. In this paper different types of adders are taken for experimental study such as Ripple Carry Adder, Carry Save adder, Carry Look ahead adder, Carry Increment adder, Carry Select adder, and Carry Skip adder. Here in this paper introducing a novel technique for designing a new Carry Select adder for multi precision...
Addition is one of the essential operations in Digital Signal Processing (DSP) applications which includes Fast Fourier Transform (FFT), Digital filters, multipliers etc. With the advancements in technology, research is still going on to design a adder that performs addition in flash of time. One of such high speed adder is Carry Save Adder (CSA). In this paper we have designed High Speed Carry Save...
Multipliers are the key components of systems viz. FIR filters, Microprocessors, Digital Signal Processors etc. which demands high performance. The performance of these applications mainly depends on the numbers of multiplication done in unit time. In real time multipliers the speed and power are the major criteria, thus faster and power efficient multipliers are needed. This paper focuses on the...
High performance digital adder with reduced area and low power consumption is an important design constraint for advanced processors. The speed of operation of such an adder is limited by carry propagation from input to output. Our work is based on designing an optimized adder for advanced processors. This paper discusses about the implementation of Carry Select Adder without using MUX for final selection...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.