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Service Assurance (SA) is a significant part of Network Function Virtualization (NFV) to enable automated and efficient service delivery from end to end (E2E). In NFV, SA should be integrated into the design and development loop from the beginning. However, it sees slower pace than other NFV management and orchestration (MANO) components. Most of present NFV-SA solutions are partial and do not provide...
Based on a literature analysis, this paper examines the nature of evolution in Systems of Systems (SoS) by attempting to answer why, where and how change occurs in this new kind of complex systems as well as what unprecedented underlying challenges makes it difficult to manage. This paper gives special focus on how state-of-the-art research efforts are attempting to solve those challenges and ultimately...
This paper focuses on low complexity architectures for check node processing in Non-Binary LDPC decoders. To be specific, we focus on Extended Min-Sum decoders and consider the state-of-the-art Forward-Backward and Syndrome-Based approaches. We recall the presorting technique that allows for significant complexity reduction at the Elementary Check Node level. The Extended-Forward architecture is then...
Polar codes are a family of capacity-achieving error-correcting codes, and they have been selected as part of the next generation wireless communication standard. Each polar code bit-channel is assigned a reliability value, used to determine which bits transmit information and which parity. Relative reliabilities need to be known by both encoders and decoders: in case of multi-mode systems, where...
In this paper, an improved and low-complexity signal detection approach for large-scale multiple-input multiple-output (MIMO) systems has been proposed. This approach utilizes the preconditioning technique to accelerate the conventional detection algorithm based on Gauss-Seidel (GS) iterative method, and achieves a detection performance close to the minimum mean square error (MMSE) detection algorithm...
The general system properties of distributed computer systems realized in the global computing environment are analyzed. The reasons for the reproduction of heterogeneity in it and its vulnerability to unauthorized exposure of executable programs are revealed. The principles of the formation in it of the universally programmable and cybersecurity algorithmic space for distributed computing by network...
Industrial solutions design is a highly complex topic due to the challenge of integrating multiple technologies into a single solution, the inherent complexity of the problems to be solved and also because the proposed solutions often require a great level of interoperability among their components and also the outside world. Dynamic Binary Translation has been used as a tool to deal with such interoperability...
Current technologies to include cloud computing, social networking, mobile applications and crowd and synthetic intelligence, coupled with the explosion in storage and processing power, are evolving massive-scale marketplaces for a wide variety of resources and services. They are also enabling unprecedented forms and levels of collaborations among human and machine entities. In this new era, trust...
Looking at the end-to-end processing, typical software-intensive systems are built as a system-of-systems where each sub-system specializes according to both the business and technology perspective. One challenge is the integration of all systems into a single system — crossing technological and organizational boundaries as well as functional domains. To facilitate the successful integration we propose...
The increasing heterogeneity of cloud resources, and the increasing diversity of services being deployed in cloud environments are leading to significant increases in the complexities of cloud resource management. This paper presents an architecture to manage heterogeneous resources and to improve service delivery in cloud environments. A loosely-coupled, hierarchical, self-adapting management model,...
Polar codes are the first class of forward error correction (FEC) codes with a provably capacity-achieving capability. Using list successive cancellation decoding (LSCD) with a large list size, the error correction performance of polar codes exceeds other well-known FEC codes. However, the hardware complexity of LSCD rapidly increases with the list size, which incurs high usage of the resources on...
In this paper a circuit-oriented approximate solution to an explicit nonlinear Model Predictive Control (NMPC) problem is proposed, based on piecewise-affine functions defined over simplicial domain partitions. The resulting controller is suitable for circuit implementation in programmable devices, such as microcontrollers or FPGA, enabling the application of NMPC to systems with low sampling times...
The complexity and diversity of today's computer architectures are requiring more attention from the software developers in order to harness all the computing power available. Furthermore, each different modern architecture requires a potentially non-overlapping set of optimizations to attain a higher fraction of its nominal peak speed. This leads to challenges about performance portability and code...
This paper presents a design method of reversible integer quaternionic paraunitary filter banks (Int-Q-PUFB) using the adder-based distributed arithmetic (DAΣ) for implementation multiplier block-lifting structure modules. The proposed quaternion multiplier (Q-MUL) and 8-channel Int-Q-PUFB processors are implemented on the FPGA Xilinx Zynq 7010. The total magnitude response of analysis-synthesis system...
In industry, evaluating candidate architectures for automotive embedded systems is routinely done during the design process. Today's engineers, however, are limited in the number of candidates that they are able to evaluate in order to find the optimal architectures. This limitation results from the difficulty in defining the candidates as it is a mostly manual process. In this work, we propose a...
Digit-serial polynomial basis multipliers over GF(2m) are broadly applied in elliptic curve cryptography, because squaring and polynomial reduction in GF(2m) are simple operations. In this paper, we define a partial product formula to derive a new digit-serial three-operand multiplication algorithm. On the basis of the proposed algorithm, we have derived a new digit-serial structures for computing...
In this paper, we proposed a new design of hybrid adder for area-efficient 32-bit floating point multiplier. By combining conventional ripple carry adder (RCA) and Wallace tree adder for adding Generated Partial Products (GPPs), the speed can be improved. Toom-3 multiplication method applied on 24×24 mantissa multiplier with a reduced complexity of (n1.465). Pre-determined Partial Products Generation...
This paper presents a low power AES-GCM authenticated encryption IP core which combines an improved four-parallel architecture, an advanced 65nm SOTB CMOS technology and a low complexity clock gating technique. As a result, the power consumption of the proposed AES-GCM core is only 8.9mW which is lower than other AES-GCM IP cores presented in literature. The detail implementation results are also...
Stochastic turbo decoder is a new scheme for turbo codes. But the long decoding latency and high complexity are two main challenges for fully parallel stochastic turbo decoders. In this paper, we proposed a novel stochastic turbo decoder scheme with two high accuracy stochastic operator modules, including no-scaling stochastic addition and stochastic normalization operator, which can improve the decoding...
Technical Debt (TD) is a metaphor used to explain the negative impacts that sub-optimal design decisions have in the long-term perspective of a software project. Although TD is acknowledged by both researchers and practitioners to have strong negative impact on Software development, its study on Testware has so far been very limited. A gap in knowledge that is important to address due to the growing...
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