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This paper presents a simulation method for the DCO. EM simulations are essential and inevitable for modern LC oscillator design. Although EM-simulators provide high accuracy, the EM-simulation time is very long when metal-oxide-metal (MoM) capacitors are present. The proposed frame-based EM-simulation can significantly reduce the EM-simulation time even in the presence of MoM capacitors without influencing...
In this paper, a new design approach for microstrip directional couplers using capacitive compensation are presented. The focus of this work is small print size, ultra-low transmission loss, low coupling and high directivity over wide bandwidth. Modified structures for the compensation capacitors were developed, where the geometrical shapes, lengths and positions of the structures can be optimized...
The purpose of this work is to provide analysis and experimental evidence of the existence of sinusoidal oscillations in a fractional-order Hartley oscillator. For this purpose a simple operational amplifier based implementation of the oscillator is studied and verified in three different cases. In particular, the first case is when the passive T-network is composed of two identical inductors and...
This paper presents 3D electromagnetic modelling of surface mount (SM) capacitors and the mutual couplings between them. 3D electromagnetic modelling software CST MWS is used for this purpose. Various SM multi-layer ceramic capacitor models are proposed and modelled. The modelling results are then verified experimentally. Comparison of the modelling and experimental results in terms of transmission...
This paper presents a calibration technique based on missing-code-detection (MCD) scheme to correct the gain error between the MSB and the LSB array in SAR ADCs with bridge-DAC structure. The MCD algorithm replaces the gain factor calculation with simple missing-codes count that significantly reduces the calibration digital overhead. It also relieves the linearity requirement of the testing signal;...
The output capacitance Coss of power semiconductors is highly dependent on the drain-source voltage. In today's commercially available silicon carbide (SiC) modules an oscillation between COSS and the parasistic module inductances occurs. The battery voltage varies with the state of charge (SoC) between 250 V and 430 V. With a dc-dc converter connected to the battery, the dc-link voltage can be adjusted...
This report studies the influence of printed circuit board (PCB) design on voltage overshoot and ringing oscillation in switching operation of gallium nitride gate injection transistor (GaN-GIT) for high-frequency DC-DC converter. The parasitic inductances in the main power loop have been identified based on moment of method (MoM) analysis and frequency characteristics of impedance measured with 2-port...
This paper presents a CMOS third order ΔΣ modulator with inverter-based integrators for low power audio signal processing application. In order to minimize the power consumption of the proposed modulator, the inverters embedded into integrators and an analog adder operating in the subthreshold region were implemented on an 180nm CMOS technology with digital and analog power supply of 1.8V and 0.8V,...
Teaching measurements means educating in making experiments. Unfortunately the human body is not equipped with the tools to sense electromagnetic quantities (in a wide range of frequencies) therefore students in physics, electronics and telecommunications engineering, have to rapidly become familiar with an entirely new world of probes, sensors and measuring instruments. Students have to learn how...
In this work, we propose a simulation methodology that incorporates derating models of decoupling capacitors for power integrity analysis. The construction of the derating models of decoupling capacitors is based on the impedance measurement and curve fitting method. Three approaches of impedance measurement are compared and the most accurate one is selected to build the derating models. The curve...
This paper studies the conducted electromagnetic interference (EMI) problems in a DC/DC switched-mode power supply (SMPS) with semi-isolated topology. A high frequency circuit simulation model is firstly established to predict the conducted emissions of this power supply. Then the common mode (CM) and the differential mode (DM) conducted emission mechanisms of this power supply are analyzed in detail...
This paper describes the miniaturization process for the branch-line coupler operating in the microwave band. This device is widely used in various fields of radioelectronics due to its useful properties. However this device turns out to be too big at low frequencies, that is why it is necessary to reduce its sizes with the preservation of its characteristics at the level equal to the coupler of standard...
A precise control of the electric field nodes relative to the maximum of the intensity envelope is a prerequisite for attosecond pulse generation and experiments in high-field physics [1]. Many carrier-envelope phase (CEP) stabilization schemes start with stabilization of an oscillator, which is nevertheless often difficult to obtain as the CEP has proven highly sensitive to environmental parameters,...
This work presents a parameter-related, one-probe based microwave characterization method for determining complex dielectric properties of various printable dielectric inks from 1–30 GHz. Dielectric constant and loss tangent of a material under test (MUT) are extracted utilizing the measured reflection 511-parameters and analyzed equivalent circuits of a cylindrical capacitor with and without the...
For the first time, complex conjugate poles are integrated on silicon by using only switches and capacitors. A general design methodology is proposed to implement low-pass transfer functions with sharper frequency profile compared to the passive-switched-capacitor topologies present in the literature. Theory and simulation results are validated through the measurements of a 0.13μm prototype filter...
This paper presents a 510nW 12-bit 200kS/s SAR-assisted SAR ADC in 40nm CMOS at 0.7V supply. A re-switching technique is proposed to suppress DNL spikes so that the size of DAC capacitor array can be minimized to reduce switching energy. A set of 2-way charge pump is used to decrease settling time constant and to increase sampling linearity. The prototype ADC achieves the DNL/INL performance of 0...
This paper presents the design and implementation of a CMOS transformer combiner that can be reconfigured to have similar efficiencies at widely separated frequency bands. Conventional transformer combiners employ a fixed tuning capacitance in the secondary network to optimize the efficiency for single frequency standard. In this work, we present a modified transformer combiner where digitally-switchable...
This paper presents a new circuit technique named as “residue oversampling,” which is suitable for high-resolution analog-to-digital converters (ADCs). By adopting this technique and simplifying dynamic element matching (DEM), the impacts of capacitor mismatch and noise upon the successive-approximation register (SAR) ADCs are diminished significantly without calibrations. The proof-of-concept prototype...
This paper reports on the implementation of a transcutaneous capacitive wireless power transfer (C-WPT) strategy for biomedical implants. The approach is based upon a series resonant converter in which the tank capacitors are replaced with a capacitive link comprising two pairs of coated parallel plates aligned around the tissue as the dielectric material. Miniaturized printed-circuit boards are developed...
This paper presents a new method for ring amplifier biasing to improve their stability while maintaining high slew rate. A multi-path ring amplifier is proposed for switched capacitor applications that allows accurate charge transfer at high speeds. Dynamic biasing improves large signal slewing without affecting residue amplifier settling performance. Stable operation is possible because the auxiliary...
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