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The primary goal of this work is to provide an easy and systematic way of developing safe soft real-time systems. To achieve this goal, we propose a method of generating real-time programs from formally verified models written as systems of timed automata. The models are verified using UPPAAL model checker prior to be processed by our code generators. A characteristic of our code generator is that...
Model-based design of embedded systems using Synchronous Reactive (SR) models is among the best practices for software development in the automotive and aeronautics industry. The correct implementation of an SR model must guarantee the synchronous assumption, that is, all the system reactions complete before the next event. This assumption can be verified using schedulability analysis, but the analysis...
Arch MDE for "Architecture-centric Model Driven Engineering" is an approach that addresses the development and the formal verification of real time software architecture. It borrows concepts from Model Driven Engineering (MDE)and software architecture for the automatic generation of a network of timed automata, in accordance with blackboard architectural style. The generation is based on...
In this paper we present an energy efficient priority based MAC protocol for Wireless Sensor Networks (WSNs). We abbreviate it as PRIMA. The PRIMA protocol consists of two phases; a clustering phase and a channel access phase. Clustering the senor network makes the MAC protocol to handle well network scalability issues. The channel access is composed of a hybrid mode of TDMA and CSMA. CSMA mode is...
In safety-critical applications, the real-time behavior is crucial for the correctness of the overall system and must be tested thoroughly. However, the generation of test traces that cover most or all of the desired behavior of a real-time system is a difficult challenge. In this paper, we present an evolutionary algorithm that generates timed test traces, which achieve a given transition coverage...
Verification of real-time systems - e.g. communication protocols or embedded controllers - is an important task. One method to detect errors is called bounded model checking (BMC). In BMC the system is iteratively unfolded and then transformed into a satisfiability problem. If an appropriate solver finds the $k$-th instance to be satisfiable a counterexample for a given safety property has been found...
A new generation of distributed real-time systems (DRTS) is based on heterogeneous models of computation and communication and is associated with flexible real-time constraints. Classical design flows based on realtime scheduling theory display important limitations related to the restrictive assumption on the system model. On the other hand, formal verification of timed automata is far more general,...
Timed automata are popular for formally analyzing real-time systems. However, it is difficult to depict real-time systems with compositional components that interact with each other in a synchronization way or a mutex way. Synchronized components are modeled using parallel composition of timed automata by Larsen et al. This paper proposes controller automata to represent real-time systems with mutex...
We propose an automated, tool-supported approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-object behaviors of a system are modeled as a set of live sequence charts (LSCs), and the scenario-based user requirement is specified as a separate LSC. By translating the set of LSC charts into a behavior-equivalent network of timed automata (TA), we reduce the problems...
We present a novel technique for synthesizing controllers for distributed real-time environments with safety requirements. Our approach is an abstraction refinement extension to the on-the-fly algorithm by Cassez et al. from 2005. Based on partial compositions of some environment components, each refinement cycle constructs a sound abstraction that can be used to obtain under- and over-approximations...
RTSSim is a framework for simulating models extracted from complex legacy real-time systems which are task-oriented, run on a single processor and are developed in C. Such RTSSim models describe functional and temporal behavior as well as the resource usage of the system. However, the semantics specification of RTSSim models remains a challenging problem indeed, especially with tractable complexity...
In this paper, we focus on modeling and verification of PLC systems, which are widespread in industry and manufacture. Our approach is based on a translation procedure from PLC programs to timed automata. The resulting model consists of several kinds of modules. Besides the main module which depicts the behaviors of the PLC programs, a dedicated module is constructed to simulate the cyclical running...
This paper presents some real-time concepts as they are found in the AADL language and proposes their expression in two formalisms suitable for formal analysis: FIACRE which is based on timed transition systems and TASM which extends abstract state machines with resource consumption mechanisms.
Monitoring and control of systems using a wireless sensor network (WSN) play a significant role in rapid automated response to events. Automation drives the necessity to check the system correctness due to the critical nature of the operations (i.e. military, air traffic management). The motes in a WSN are event-driven systems. The evolution of the system can be captured by discrete and continuous...
There is more and more the ubiquitous use of different types of real-time embedded (RTE) systems in our daily lives with rapid developments in science and technology. Because design faults might result in injury or even death to human beings who are using these systems, how to ensure the RTE systems are really safe is very important. The schedulability problem is a very important problem needs to...
Real-time database management systems (RTDBMS) are recently subject of an intensive research. Model checking algorithms and verification tools are of great concern as well. In this paper we show some possibilities of using a verification tool Uppaal on some variants of pessimistic concurrency control protocols used in real-time database management systems. We present some possible models of such protocols...
This paper presents a framework for modeling and verification of mini real-time applications running under a multitasking kernel. The model described as networks of timed automata is mapped to real time operating systemspsila tasks. We focus on cooperative scheduling tasks with different priorities. For the tasks to be as simple as possible, a unified resource access interface is necessary.
A high bandwidth critical path monitor (1 sample/ cycle at 4-5 GHz) capable of providing real-time timing margin information to a variable voltage/frequency scaling control loop is described. The critical path monitor tracks the critical path delay to within 1 FO2 inverter delay with a standard deviation less than 3 FO2 delays over process, voltage, temperature, and workload. The CPM is sensitive...
Systems verification requires first to model the system to be verified, then to formalize the properties to be satisfied, and finally to describe the behaviour of the environment. This last point, known as the proof context, is often neglected. It could, however, be of great importance in order to reduce the complexity of the proof. The question is then how to formalize such a proof context. This...
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In this paper we give a formal definition of end-to-end latency, and use this as the basis for checking whether a stipulated deadline is violated within a bounded time. For unbounded verification, we model the system as a set...
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