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This paper describes the design, modelling and characterization of transmission lines for millimetre wave silicon integrated circuits up to 65 GHz. The simulation results of three different EM simulators for a selected hybrid coplanar layout structure are presented. Two different deembedding methods are investigated and compared with respect to sensitivity to typical measurement errors. Finally both...
This paper reports experimental characteristics of transmission lines in standard CMOS technology up to 110 GHz, three structures, coplanar waveguide (CPW), microstrip line (MS) and grounded coplanar waveguide (GCPW) are designed in the same process with low loss and satisfaction of metal density requirements. Good agreement between EM simulation and measurement is obtained, attenuation as low as...
Recently, differential transmission lines which have low electromagnetic radiation performance are widely used for high speed digital interconnections. Though high electrical balance is required to obtain that performance, degradation of the balance may often occur from asymmetry of the structure, such as additional patterns and electrical components connected to one or both of single lines of differential...
Due to a lot of thermal and mechanical loads during TSV process or post TSV process such as metallization and die stacking, disconnection failure can occur which results in 3D IC yield loss. Thus, a non-destructive diagnostic method by using one point probing for TSV failures is proposed to detect and differentiate TSV failure types and locations. With the fabricated test vehicles with disconnection...
This paper investigates the properties of the on-chip transmission lines with and without metal grounding based on measured data. Physical equivalent-circuit models are employed to evaluate the transmission lines with different ground planes, and the model parameters to predict the characteristics in the oxide layer were established and compared refer to the physical mechanism. Two different structures...
Microstrip transmission line (MS), coplanar waveguide transmission line (CPW), grounded coplanar waveguide transmission line (GCPW), slow-wave transmission line with slotted grounded shields (GSCPW), slow-wave transmission line with slotted floating shields (FSCPW) are widely used in the silicon technology. Because the quasi-TEM assumption is still valid in these structures, an equivalent circuit...
Transmission-line models for high-frequency wideband applications should preferably directly relate to the physical dimensions and effects. Various simulation modes (both linear and non-linear in the frequency- and time-domain) point towards the use of a straightforward model using frequency dependent resistances, inductances, and capacitances. However, not all simulators accept frequency dependent...
The characterization of interconnection lines used in the design of high frequency synchronization systems is presented in this paper. The transmission line characterization is carried out from the corresponding S-parameter measurements of two microstrip line test structures designed and fabricated using an Austriamicrosystems 0.35 ??m process technology. The microstrip test structures are fabricated...
This paper presents an investigation of the coupling between probe tips and wafer surface through EM-simulation and compares the simulation results to measurements. It is pointed out that the results are very dependent on the adjacent structures lying under the probe tips. Different solutions are analyzed to master and/or reduce the coupling and ensure reproducibility.
In this paper, influences on CMOS voltage controlled oscillator (VCO) caused by dummy metal fills are investigated. Two fully integrated VCOs are fabricated, tested and verified in 0.18-mum 1P6M bulk CMOS technology. The area-consuming inductors and capacitors of the VCOs are implemented by multilayer complementary-conducting- strip transmission lines (CCS TLs) and metal-oxcide-metal (MOM) capacitors,...
This paper discusses the design of a 60 GHz low noise amplifier (LNA) using a standard low power SOI CMOS process from ST Microelectronics. First, we outline the technology as well as the mm-wave design challenges. Using recent work on coplanar waveguide (CPW) modeling, we describe how it's possible to use parametric, 3D electromagnetic simulation to complete or replace analytical models of on-chip...
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