The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, an intelligent battery charger for a set of Ni-Cd batteries is designed, Simulated and experimentally tested. A fuzzy inference process utilized in a power management system (PMS) to control a BUCK converter as a battery charging system. Battery temperature and voltage variations are used as controller input variables and charge current as output. Battery voltage and temperature is...
With the increasing use of mobile computing devices such as PDAs, laptops, and the expansion of wireless local area networks (WLAN), there is growing interest in increasing productivity and efficiency through enhancing received signal power. This research demonstrated a band pass square-loop frequency selective surface (FSS) in walls to increase the efficiency of certain communication systems. The...
This article presents a new current-mode squarer based on MO-CCTA (multiple output current conveyor transconductance amplifier). The circuit description is very simple, its construction consists of merely 2 MO-CCTAs. Without external passive elements, the proposed circuit is then suitable for IC architecture. The PSPICE simulation and experimental results are depicted, and agree well with the theoretical...
A power-on-reset circuit of novel simple structure and high reliability is proposed. The circuit has been designed in 0.5 mum bipolar CMOS technology. The simulation was performed with 0.5 mum CSMC process model and Cadence Spectre and the results show that the circuit has a stable and reliable performance. With the differences of supply voltage's ramp rate, temperature and process, the change of...
From the linear RLC circuit of impulse current generator, the relations between the parameters T1, T2, im of pulsed current wave and damping coefficient parameters alpha of the circuit ware studies in this paper. The currents parameters of impulse current generator which can generate the standard lightning currents (100kA, 8/20mus and 50kA, 10/350mus) were calculated by using the relations, and simulated...
Stabilizing circuits in platform inertial navigation systems (INS) based on fiber optic gyroscopes (FOGS) are important devices, but, in designing a self-adapted active disturbance rejection controller (ADRC) of the stabilizing circuits in FOGS, the ADRC arithmetic is found difficult to adjust its parameters, so ADRC with fuzzy control theory is designed. This controller has both the PID and Fuzzy...
In infrared focal plane arrays (IRFPA) applications, variable gain of capacitor feedback transimpedance amplifier (CTIA) cells in readout integrated circuit (ROIC) is required to achieve a widely dynamic range and keep CTIA cells away from saturation. Selectable integration capacitors CTIA cell and a counter-based novel timing control circuit are proposed and presented in this paper. With the two...
Based on a PWL memristor, Chua's circuit is modified through element replacement, simulation results demonstrated that chaos attractor can be generated in the modified Chua's circuit.
This paper presents a current-mode analog multiplier/divider based on current conveyors. The proposed circuit employs only two second-generation current conveyors with controlled current gains (KCCIIs). The circuit is active only; it does not require any external passive element. Then, it is suitable for implementation as integrated circuit. The proposed circuit can perform as either a four-quadrant...
As one kind of multilevel inverters, three-level inverter is widely used in the high-power and high-voltage applications. However, the increasing of the power devices improves the system's fault rate. How to ensure stable operation of the system has become an important research question. Through theoretical analysis and simulation on three-level high-power inverter, the paper analyses the working...
In this paper, a circuit technique to realize Max/Min finder for fuzzy applications is presented. The maximum or minimum operation can be provided by setting the external control current without changing the topology, while the input signals are in the voltage forms. The proposed Max/Min finder configuration is simple and suitable for fabrication in standard CMOS technology. The circuit performance...
The optimal operation of a rail vehicle with on-board energy storage device minimizing energy consumption in catenary free mode is discussed in this paper. The electric double layer capacitor (EDLC) is assumed as an energy storage device because of its high power density, long lifetime and quick charge/discharge. The proposed method can determine the optimal acceleration/deceleration at each sampling...
A voltage-mode Kerwin-Huelsman-Newcomb (KHN) filter using DVCCs is presented. The filter has high input impedance and employs four active elements, two grounded capacitors and five grounded resistors. Based on the generalized description of the proposed structure various solutions are presented and compared. Spice simulation results are included to verify and demonstrate the feasibility of the KHN...
Power Electronics education at the University of Liege exhibits a particular feature, in that a person from industry is directly involved in the teaching of the introductory Power Electronics course since academic year 2007-2008. Together with him, we teach this subject making use of a project-oriented method. After two years of this experience, it is now of great interest to analyze the main benefits...
When an electric machine is designed, a dynamic model of the machine is advantageous in order to predict the electromagnetic, electric and mechanical behavior. In this paper a new modeling method of the dynamic behavior of the switched reluctance motor is presented. It bases on the macromodelling approach, which gives the advantages of minimum input data for the simulation and acceptable flexibility...
IBIS4.2 (I/O Buffer Information Specification) standard describes the hysteresis behavior from one simulation point to the other. In an analog simulator, solution is obtained based on multiple iterations in between simulation points. These iterations can lead to undesired behavior. The common problem that might be encountered with this specific behavior in an analog simulator due to iterations will...
Simultaneous switching noise (SSN) is an important issue for the design and test and actual ICs. In particular, SSN that originates from the internal logic circuitry becomes a serious problem as the speed and density of the internal circuit increase. In this paper, an on-chip monitor is proposed to detect potential logic errors in digital circuits due to the presence of SSN. This monitor checks the...
In this paper a BISR architecture for embedded memories is presented. The proposed scheme utilises a multiple bank cache-like memory for repairs. Statistical analysis is used for minimisation of the total resources required to achieve a very high fault coverage. Simulation results show that the proposed BISR scheme is characterised by high efficiency and low area overhead, even for high defect densities...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
This paper introduces a novel current sense amplifier (CSA) in sub-32nm fully depleted (FD) double-gate (DG) silicon-on-insulator (SOI) technology with planar independent self-aligned gates. A new architecture is proposed which takes advantage of the back gate in order to improve circuit properties. Compared to the reference circuit, the new architecture proves to be faster (21% sensing delay decrease),...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.