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A comparative analysis of the plug-in fuel cell vehicles (PFCV) is studied regarding different topologies, drive cycles and control strategies. To improve the performance of the PFCV, an optimization strategy is proposed at first by regulating the power distribution between the battery and the PEMFC system. Then, a direct multiple shooting (DMS) algorithm is used to solve this nonlinear programming...
We present a new methodology for automatic selection and sizing of analog circuits demonstrated on the OTA circuit class. The methodology consists of two steps: a generic topology selection method supported by a “part-sizing” process and subsequent final sizing. The circuit topologies provided by a reuse library are classified in a topology tree. The appropriate topology is selected by traversing...
In this paper not only a modified multi-device LinVerter is proposed but also a novel approach to control this topology is introduced. This topology is able to improve the conventional LinVerter performance using parallel power devices and designing a sequential switching scheme. In addition, from control perspective, a novel control approach based on bidirectional interface between LTspice and MATLAB...
This work presents novel analog sizing flows based on analytical techniques. A graph-based operating point driven sizing approach provides operating point voltages and a rough sizing with respect to constraints. A voltage-range analysis method using linearized operating-point models obtains information about feasible voltage ranges. A direct-sizing method solves nonlinear algebraic circuit equations...
This paper presents a general approach for hierarchical performance estimation (PE) of any analog system. Not only PE is evaluated by the extracted Pareto Fronts (PF) but also an approximate design of the system is obtained. PE of an analog system requires a well-determined performance design space (PDS) exploration for a given technology. PF which is a very useful technique for evaluating the performance...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
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