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In this paper the simple method to reduce the switching energy of capacitive digital-to-analog converters (DACs) in low-power successive approximation register (SAR) analog-to-digital converters (ADCs) is described. The method is based on the well-known monotonic switching procedure and the use of one intermediate voltage level during switching. Unlike most recently published switching methods the...
As in most of the renewable energy sources it is not possible to generate high voltage directly, the study of high gain dc-dc converters is an emerging area of research. This paper presents a high step-up dc-dc converter based on current-fed Cockcroft-Walton multiplier. This converter not only steps up the voltage gain but also eliminates the use of high frequency transformer which adds to cost and...
Factory acceptance tests performed on High Voltage Direct Current (HVDC) transmission apparatus usually involve the application of high direct voltage and switching impulse voltage in separate withstand tests used to qualify the insulation system. However, the actual stress subjected to the equipment insulation system while in-service on the HVDC transmission system, is a switching surge transient...
In ADC BIST testing circuit, ramp signal is the most widely used stimulus because of its simple structure and ease of control. In addition, with SEIR algorithm, the linearity requirement of the ramp signal is highly relaxed. But for high resolution ADC BIST testing, the ramp signal must be repetitive for acquiring valid data because a single ramp will cost large area, which is not acceptable for BIST...
This article presents a modular approach to generate the interleaved carriers of a parallel converters. Compared with previous solutions requiring accurate analog computations, a straightforward implementation of the generator is proposed here. By using only comparators and logical gates dedicated to the tuning of the carrier phase, a correct interleaving of the carriers is obtained in steady-state...
A new current-mode triangular/square wave generator based on MO-CFTAs (Multiple output current follower transconductance amplifiers) is presented in this paper. The circuit description is very simple, its construction consists of 2 MO-CFTAs and 1 grounded capacitor without any external resistor. The output frequency and triangular/square wave amplitudes can be electronically/independently tuned via...
Electrostatic energy harvesters powered by ambient motion and integrated at the microscale are an attractive replacement for batteries in small, low-power electronic devices. This paper contains model and design considerations for electrostatic generators based on mechanically-variable capacitors. The performance of single-stage and multistage microgenerators are compared. The main design trade-offs...
This paper presents the development of the SNCF's HIL plateform whose purpose is testing, evaluation and validation of Energy Management Systems (EMS) for hybrid railway systems. In this way, The real EMS of the SNCF's hybrid locomotive PLATHEE has been coupled with modeling of the hybrid traction chain through a real Controller Area Network protocol (CAB) and signal HIL simulation has been performed‥...
Pulse electric field (PEF) is an important technique in food treatment to inactivate microorganism. This PEF is an alternative method from conventional thermal methods in food sterilization industry. The role of PEF is to maintain the foods flavor for a small difference range of temperature to find fresh quality of nutritious foods. The new topology for power electronics converter with Marx configuration...
A switched capacitor charge pump applicable to phase change memory(PCM) is presented, which can provide a extra low ripple DC output of 5V with a maximum load condition of 10mA. For low output ripple and high power effiency, a novel operation mode is used. Compared with the conventional switched capacitor charge pump, the flying capacitor of the proposed charge pump is charged to Vo-VDD instead of...
A charge sharing clock scheme is proposed to feed a 5-stage double charge pump circuit. By reusing the charges in charging or discharging the parasitic capacitance during the pumping process, dynamic power loss is able to be reduced by nearly a half. Under 1V supply, simulation results show a maximum 10% efficiency increase, and the ripple noise is also reduced by a half comparing to the conventional...
Power flow control for the distributed generator (DG) with Electric Double Layer Capacitor (EDLC) is studied. The DG system consists of a voltage type inverter for connection to the AC-line and a two-quadrant DC chopper for connection to the DC-bus. The inverter and the DC chopper can be controlled cooperatively to regulate active power flow. The active power from DG to AC line is regulated by the...
This paper deals with a high-powered, low-loss and digital current disturbance generator. It can produce harmonic current, active current, inductive reactive current and capacitive reactive current, so it is able to simulate kinds of actual industrial situations. By using energy feedback technology, the generator feeds the power consumed by the current disturbance back to the grid. Thus, it can save...
This work presents the analysis and performance of connecting two wind power generation systems with the energy storage at the dc side. Energy storage is desirable to be installed to keep constant output from the wind power generation system. The DC connection of two wind power generation system helps to exchange power between the two systems and can suppress the disturbance of the output power to...
An on-chip buck converter with 3D chip stacking is proposed and the operation is experimentally verified. The manufactured converter achieves a maximum power efficiency of 62% for an output current of 70mA with a switching frequency of 200MHz and a 2x2mm on-chip LC output filter in 0.35mum CMOS. The use of glass epoxy interposer to increase the maximum power efficiency up to 71.3%, and the power efficiency...
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
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