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Different industrial applications essentially require a reliable communication without data loss for smooth functioning and better control performance. Controller Area Network (CAN) bus based Distributed embedded systems can provide better communication solution to satisfy this requirement. In addition to this, also provides safety for critical applications, inter-operability between systems, data...
This work addresses communication challenges associated with computationally limited distributed embedded systems. Methods for overcoming these challenges are implemented and tested on a robotics testbed called the Distributed Flight Array (DFA). The DFA consists of distributed computational units that can be assembled at random into a wired and/or wireless mesh network. Coordinate control of the...
The Clock Constraint Specification Language (CCSL) provides expressions and relations to specify the time requirements and causal dependencies of systems. It was initially proposed, in the context of MARTE: the UML profile for Modeling and Analysis of Real-Time and Embedded Systems. In this paper, we propose a method to verify CCSL specifications. We give a formal state-based interpretation of a fundamental...
Many applications contain loops with an undetermined number of iterations. These loops have to be parallelized in order to increase the throughput when executed on an embedded multiprocessor platform. This paper presents a method to automatically extract a parallel task graph based on function level parallelism from a sequential nested loop program with while loops. In the parallelized task graph...
Time-triggered execution of periodic tasks provides the cornerstone of dependable real-time systems. In addition, there is often a need for executing event-triggered activities while the system would be otherwise idle. If time-triggered and event-triggered activities exchange information among each other, the data flow must be synchronized such that reading unfinished output data is avoided. We present...
Commercial multicore platforms offer flexibility, computational power, and energy efficiency. However, a key open issue remains: how can designers quickly and efficiently map an application onto such a platform while profiting from the potential benefits? This article presents a tool to parallelize applications for execution on embedded multicore platforms, allowing fast design space exploration.
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