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Secure communications become more, more important with the exponential growth of Internet data services. However, to massively deploy such services in current networks, we need to deal with different architectures, time-consuming encryption/decryption algorithms. Recently, numerous research efforts have been focused on parallel computing using high-end discrete GPGPU to achieve peak throughput, while...
How to make use of multicore computing resources to accelerate the block cryptography applications has become a common concern problem. And the block cryptography applications have not yet been explored in procedure level speculation thoroughly. This paper proposes a procedure level speculation mechanism for accelerating block cryptography applications, including execution model, synchronization strategy...
With the improvement of cryptanalysis, More and more applications are starting to use Advanced Encryption Standard (AES) instead of Data Encryption Standard (DES) to protect their information security. However, current implementations of AES algorithm suffer from huge CPU resource consumption and low throughput. In this paper, we studied the technologies of GPU parallel computing and its optimized...
This paper describes a Cuckoo-based Pattern Matching (CPM) engine based on a recently developed hashing algorithm called Cuckoo Hashing. We implement the improved parallel Cuckoo Hashing suitable for hardware-based multi-pattern matching with arbitrary length. CPM can rapidly update the static pattern set without reconfiguration while consuming the lowest amount of hardware. With the power of massively...
Multimedia and some scientific applications have achieved good performance on the stream processor architecture by employing the stream programming model. In order to find out the way to accelerate the symmetric cryptograph on stream processor, we implement and analyze cryptograph algorithms on different stream processors in this paper. Four cipher algorithms including RC5, AES, TWOFISH and 3DES in...
Benefit from the novel compute unified device architecture (CUDA) introduced by NVIDIA, graphics processing unit (GPU) turns out to be a promising solution for cryptography applications. In this paper we present an efficient implementation for MD5-RC4 encryption using NVIDIA GPU with novel CUDA programming framework. The MD5-RC4 encryption algorithm was implemented on NVIDIA GeForce 9800GTX GPU. The...
Web servers often need to manage encrypted transfers of data. The encryption activity is computationally intensive, and exposes a significant degree of parallelism. At the same time, cheap multicore processors are readily available on graphics hardware, and toolchains for development of general purpose programs are being released by the vendors. In this paper, we propose an effective implementation...
A novel cryptographic core (cryptocore) approach for secure communications is presented in this work. It is an AES-Counter Mode core for System-on-Programmable-Devices that takes advantage from the flexibility of the reconfigurable devices. The proposed architecture is parameterizable, so it is easily scalable to fulfill different target area-speed trade-offs. This parametrization affects both the...
This paper presents a hardware implementation of a secure and reliable k-out-of-n threshold based secret image sharing method. The secret image is divided into n image shares so that any k image shares are sufficient to reconstruct the secret image in a lossless manner, but (k-1) or fewer image shares cannot reveal anything about the secret image. This secret sharing method comprises multiple independent...
Mobile agents as network computing technology has been applied to solve various parallel and distributed computing problems, including parallel processing, information search and network management. Protection of the mobile agents in the network and against the hosts is a difficult task. In this paper, we analyze the increased security solutions provided by a novel class of mobile agents called ICMA...
In the block ciphers, though the operation is quite complex, there are a lot of similar characteristics including arithmetic unit, operation width, parallel data and ordinal implement. It is very suitable for designing ASIP (application specific instruction set processor) targeted at block ciphers. In this thesis, a reconfigurable processor architecture is proposed, At the mean time, in order to improve...
Reconfigurable clustered block cipher processor (RCBCP) is a fast and flexible block cipher processor. This paper presents the parallelism exploitation of RCBCP. In this paper, operation-level-parallelism (OLP) is put forward. Based on the characteristics of block cipher processing, OLP, instruction-level parallelism (ILP) and thread-level-parallelism (TLP) of this architecture are systematically...
We propose a novel, high-speed, low-area architecture for multiplication over GF(2m). The proposed architecture is processor array based, which utilizes the most significant bit multiplication algorithm and polynomial basis. A design space exploration to optimize the area and speed of the proposed architecture was done. Our architecture requires only m processing elements as compared to m2/2 for the...
This paper presents a reconfigurable curve-based cryptoprocessor that accelerates scalar multiplication of Elliptic Curve Cryptography (ECC) and HyperElliptic Curve Cryptography (HECC) of genus 2 over GF(2n). By allocating a copies of processing cores that embed reconfigurable Modular Arithmetic Logic Units (MALUs) over GF(2n), the scalar multiplication of ECC/HECC can be accelerated by exploiting...
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