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This paper describes and verifies a method of implementing bit error rate (BER) calculation for FPGA-based physical layer security techniques for Software Defined Radio (SDR). Specifically, we describe an independent source signal processing architecture for an efficient calculation of BER for wireless communication modules across the transmitter and receiver nodes. The source components at the transmitter...
This paper presents an FPGA-based prototype of the dual link algorithm that maximize the achievable weighted sum rate for MIMO interference network. The iterative algorithm is fast monotone convergent but it must be completed quickly through pilot signaling. Therefore we propose an FPGA-based implementation, targeting software defined radio (SDR) platforms, that is designed to rapidly process the...
This paper presents an approach of model-based design for implementing a digital communication system on a field programmable gate array (FPGA) for a software defined radio (SDR). SDR is a popular prototyping platform for wireless communication systems due to its flexibility and utility. A traditional SDR system performs nearly all computations and signal processing tasks on the host computer, and...
The usage of locating systems in sports (e.g. soccer) elevates match and training analysis to a new level. By tracking players and balls during matches or training, the performance of players can be analyzed, the training can be adapted and new strategies can be developed. The radio-based RedFIR system equips players and the ball with miniaturized transmitters, while antennas distributed around the...
An FPGA implementation of an all-digital fully compliant IEEE 802.11b and 802.15.4 configurable baseband receiver is presented. This architecture can be integrated in systems implementing the Software Defined Radio (SDR) paradigm, relaxing the need for high power consumption general purpose processors. The receiver uses a single architecture that can be configured for receiving either standard at...
The digital channelized receiver is an efficient way to deal with broadband signal. In this paper, one kind of channelized algorithm based on poly-phase filter is derived. We discussed the realization of a multi-channel receiver applied to the software radio platform in details. The computing core of this platform is FPGA. Simulation result of the channelized receiver is given. The test in practical...
Broadcast radio is a rich yet underexploited source of multimedia content. To make this content available to users, it will be indispensable to develop new types of navigators capable of searching the large quantities of information contained in the radio bands. The article introduces a prototype of a new software radio enabled broadcast media navigator implemented on a Field Programmable Gate Array...
The 802.15.4 was chosen by Zigbee as the physical layer due to its characteristics; low power and low hardware complexity. This will make it available in a large number of devices ranging from remote controls to wireless sensors. We present a design for the Baseband section of the PHY and a laboratory testing environment where the real world impairments are simulated and controlled by the user to...
In this paper, a complete architecture of the software defined radio receiver is proposed. First, a precise definition and the discussion of the problem is given. Next, an outline of the system topology is proposed, together with the requirements for each component of the system. Finally, a custom implementation is presented, including specifications, design considerations, and simulations.
We describe our experience introducing DSP concepts via an FPGA-based advanced digital design course. The students had previously taken an introductory digital design course and a continuous-time linear systems course; a few were taking an introductory DSP course concurrently. Through a series of weekly lab exercises, the students learned advanced FPGA design methods while progressively constructing...
GNSS is entering into a period of intense change over the next 5-10 years which will impact on users and operators of high-end GNSS equipment. For many years, GPS and GLONASS existed as the only systems. However, all is set to change with the advent of new global and regional systems (Galileo, Compass, IRNSS, GINS and QZSS), augmentation services and test satellites offering combined new and improved...
This paper presents a homogeneous Multi-Processor System-on-Chip (MPSoC) as baseband signal processing engine for software defined radio applications. The implementation and parallelisation of a generic OFDM system is presented taking as study case the physical layer of the IEEE 802.11a standard. The MPSoC is composed of nine computational nodes connected in a mesh topology through a hierarchical...
The implementation of a ranging exploitation method over the IEEE 802.11 signal standard for a software-defined radio architecture is presented. We propose the current wireless local access network (WLAN) as standard assistive infrastructure for ubiquitous localisation and positioning. The paper describes the architecture of a localisation receiver built around a FPGA. The described receiver can ideally...
Some wireless communication systems must be able to receive and process signals from multiple source stations simultaneously. A common practice is to use multiple duplicated hardware resources; a different set of resources for each received station. A new coherent amplitude modulated (AM), time-division multiplexed (TDM), receiver system architecture and design, based on the software-defined radio...
In this paper, the design and implementation of a frequency hopping TDMA system is presented. The system is built around software defined radio concepts. The system architecture is described in detail, which is composed of three modules. High performance digital devices of DSP and FPGA realize the IF digitalization. Software implementation for frequency hopping synchronization is discussed and a method...
In this paper an FPGA implementation of a high performance programmable digital FM modem has been done for targeting towards the Software Defined Radio (SDR) application. The proposed design consists of the reprogrammable, area optimized and low-power features. The modulator and demodulator contain a compressed direct digital synthesizer (DDS) for generating the carrier frequency with spurious free...
DVB-T2, the revision of DVB-T (Terrestrial Digital Video Broadcasting), was recently finalized, targeting to high definition television (HDTV). To pave the way to commercialization, an appropriate implementation concept and its corresponding validation are of utmost importance. Without a doubt, the most challenging requirements introduced by the DVB-T2 specification are an FFT (Fast Fourier Transform)...
The development of Software Defined Radio systems and their extension to Cognitive Radio Systems and Smart Radio Systems have introduced a plethora of topics and examples that can be included in the curriculum. The design of these software defined radio systems has less in common with traditional radio design and more in common with the design of Embedded Systems and Software Engineering. This purpose...
Some wireless communication systems must be able to receive and process signals from multiple source channels (stations) simultaneously. A common practice is to use multiple duplicated hardware resources; a different set of resources for each received channel. A new coherent Amplitude Modulated (AM) Time Division Multiplexed (TDM) receiver system architecture and design, based on the Software Defined...
Fast Fourier Transform (FFT) is the most basic and essential part of Software Defined Radio (SDR). Therefore, designing regular, reconfigurable, modular and low hardware complexity FFT computation block is very important. A single FFT block should be configurable for varying length FFT computation and also for computation of different transforms like DCT, DST etc. In this paper, the authors analyze...
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