The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Cognitive radio networks are becoming popular day by day as the need for spectrum is increasing. Its ability to use and reuse the underutilized spectrum makes it a very impressive technology. However it has many challenges that need to be overcome. It needs a well defined architecture and good quality high end equipments in order to get the 100% of cognitive radio. This paper discusses the cognitive...
In modern distribution systems, the wide presence of Distributed Energy Resources (DERs) (e.g. intermittent and non-programmable renewable sources, such as photovoltaic power plants and micro wind turbines), is going to cause increasing problems in the traditional management of the distribution grid. Recently, the use of Distributed Energy Storage Systems (DESSs) has been proposed to limit the impact...
The big.LITTLE architecture, that is single-ISA heterogeneous multi-core, has been attracted attention as a modern processor architecture. Appropriate power management methods can achieve high-performance and power-efficiency of embedded real-time systems simultaneously. This paper proposes an evaluation framework of OS-level power managements for the big.LITTLE architecture. The proposed framework...
In this paper, we present a novel cell outage management (COM) framework for heterogeneous networks with split control and data planes—a candidate architecture for meeting future capacity, quality-of-service, and energy efficiency demands. In such an architecture, the control and data functionalities are not necessarily handled by the same node. The control base stations (BSs) manage the transmission...
In this paper, we present two novel real-time heterogeneous platforms with three kinds of devices (CPU, GPU, FPGA), i.e. trigeneous platforms, for efficiently accelerating computation intensive applications in both the high-performance computing and the embedded system domains. In the high-performance computing domain, the entire platform is implemented on a workstation which consists of an Intel...
With the exponentially increasing capacity demands anticipated in next generation wireless networks, densifying the network using cmW and mmW small cells supporting high bandwidths is seen to be the trend in 5G networks. Such ultra-dense deployment of cells would also lead to a higher amount of power consumption, from the UE and network perspective, due to the increased measurement requirements and...
Practical considerations for future supercomputer designs will impose limits on both instantaneous power consumption and total energy consumption. Working within these constraints while providing the maximum possible performance, application developers will need to optimize their code for speed alongside power and energy concerns. This paper analyzes the effectiveness of several code optimizations...
Recent system on chip (SoC) techniques have permitted the continued scaling of core densities at a rate sufficient to track Moore's Law. However, this continued increase in transistor density has warranted new hardware features in order to sufficiently scale the degree of on-chip concurrency. Features such as complex multi-level caches, hierarchical core configurations and hardware-assisted threading...
Power and performance are two potentially opposing objectives in the design of a supercomputer, where increases in performance often come at the cost of increased power consumption and vice versa. The task of simultaneously maximising both objectives is becoming an increasingly prominent challenge in the development of future exascale supercomputers. To gain some perspective on the scale of the challenge,...
The concerns of data-intensiveness and energy awareness are actively reshaping the design of high-performance computing (HPC) systems nowadays. The Graph500 is a widely adopted benchmark for evaluating the performance of computing systems for data-intensive workloads. In this paper, we introduce a data-parallel implementation of Graph500 on the Intel Single-chip Cloud Computer (SCC). The SCC features...
For a standalone Fall Detection system based on computer vision we want to obtain a low power architecture to meet the real time processing, power consumption, energy constraints which also satisfy the high performance in recognition, and accuracy. In this paper, we present the different architecture explorations for Fall Detection system implemented on heterogeneous platform as Zynq-7000 AP SoC platform...
For more than a decade, the PAPI performance-monitoring library has provided a clear, portable interface to the hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). Most major end-user tools that application developers use to analyze the performance of their applications rely on PAPI to gain access to these performance...
Many-core architectures are playing an important role in the HPC systems. But they are giving high performance at the cost of a great electrical power consumption. On Tianhe-2 supercomputer, the Xeon Phi many-core processors contribute nearly 80% of the system power. Power models are important to guide the design of dynamic power management (DPM) algorithms by predicting the power consumption with...
Accelerators are used in about 13% of the current Top500 List. Supercomputers leveraging accelerators grew by a factor of 2.2x in 2012 and are expected to completely dominate the Top500 by 2015. Though most of these deployments use NVIDIA GPGPU accelerators, Intel's Xeon Phi architecture will likely grow in popularity in the coming years. Unfortunately, there are few studies analyzing the performance...
Energy efficiency and other sustainability issues are common concerns in the material production industries but rarely addressed in software development efforts. Instead, traditional software development life cycles and methodologies place an emphasis on maintainability and other intrinsic software quality features. One standard practice is to improve maintainability by detecting bad smells in a system's...
Small Cells are under extensive investigation as a potential solution to meet the increasing capacity demand due to ever growing data traffic over cellular networks. The architecture of small cells is still under discussion, various architectures have been proposed based on potential use cases. One of the most important use cases is to deploy small cells on a different frequency than that of the macro...
We present the design and development of the first fully integrated, two stage Doherty power amplifier (DPA) in the Ka-Band. The DPA is fabricated in a 0.15-μm GaAs pseudomorphic high electron mobility transistor (pHEMT) process. At 26.4 GHz, the amplifier achieves measured small signal gain of 10.3 dB, output power at 1-dB compression point (P1dB) of 25.1 dBm, peak power added efficiency (PAE) of...
Modern trends, including increased electricity requirements and improvements in grid management technologies, are causing the electric industry and regulators to review how the grid is achieved. With this aim, in this paper a low cost solution for the real-time energy management in a smart grid, is presented. It provides several smart meters, which act as slaves, that continuously monitor connected...
Heterogeneous computing using Graphic Processing Units (GPUs) has become an attractive computing model given the available scale of data-parallel performance and programming standards such as OpenCL. However, given the energy issues present with GPUs, some devices can exhaust power budgets quickly. Better solutions are needed to effectively exploit the power efficiency available on heterogeneous systems...
Modern GPUs are true power houses in every meaning of the word: While they offer general-purpose (GPGPU) compute performance an order of magnitude higher than that of conventional CPUs, they have also been rapidly approaching the infamous “power wall”, as a single chip sometimes consumes more than 300W. Thus, the design space of GPGPU microarchitecture has been extended by another dimension: power...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.