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The graphics processing unit (GPU) has evolved from being a fixed-function processor with programmable stages into a programmable processor with many fixed-function components that deliver massive parallelism. By modifying the GPU's stream processor to support “general-purpose computation” on the GPU (GPGPU), applications that perform massive vector operations can realize many orders-of-magnitude...
Recently, an efficient damped pseudo transient analysis method was proposed to find DC solutions for nonlinear circuits. However, the simulation efficiency is still not satisfactory. In this paper, for different kinds of circuits, we get some groups of PTRAN algorithm control parameters values by using a parameter optimization algorithm for pseudo-transient analysis to obtain higher efficiency during...
Internet of Things (IoT) devices pose a serious threat to the web as poorly configured or faulty devices can be used for massive Distributed Denial of Service attacks. High jacked IoT devices that act like real users are a particular problem that present significant difficulties for traditional detection methods. An adaptive, real time scoring system for detecting such attacks is proposed that does...
This paper presents implementation of fault emulation method which is very important in today's chip tests on a platform with heterogeneous architecture. Nowadays, the increase in the number of transistors in electronic circuits put fault emulation method forward which is faster than fault simulation in order to obtain a test set against possible defects on chips. In this method, a hardware model...
The Particle Swarm Optimization (PSO) has been widely used to solve the selective harmonic elimination (SHE) problem, however, the executing efficiency is not very good if it is implement on the traditional Central Processing Units (CPUs). In this paper, the PSO is parallel implemented on the Graphical Processing Unit (GPU) under the Compute Unified Device Architecture (CUDA). Then, the GPU-accelerated...
With the bottom-line goal of increasing the throughput of a GPU-accelerated JPEG 2000 encoder, this paper evaluates whether the post-compression rate control and packetization routines should be carried out on the CPU or on the GPU. Three co-processing models that differ in how the workload is split among the CPU and GPU are introduced. Both routines are discussed and algorithms for executing them...
Mesoscopic Traffic Simulation is an important tool in traffic analysis and traffic management support. The balance between traffic modeling details and performance has made Mesoscopic Traffic Simulation one of the key solutions for traffic controllers and policy makers. Mesoscopic traffic simulators offer acceptable speed in simulating normal traffic. However, when traffic prediction and optimization...
Modern computer systems are accelerator-rich, equipped with many types of hardware accelerators to speed up computation. For example, graphics processing units (GPUs) are a type of accelerators that are widely employed to accelerate parallel workloads. In order to well utilize different accelerators to gain better execution time speedup or reduce total energy consumption, many scheduling algorithms...
Scientific workflows are increasingly containerised, which requires rethinking central processing unit (CPU) sharing policies to accommodate different workload types. However, container engines running scientific workflows struggle to share the CPU fairly, as workload characteristics are not taken into account. This paper proposes a sharing policy called the Adaptive Completely Fair Scheduling policy...
This paper presents three implementation algorithms of compound elements pseudo-transient analysis to find DC solutions for nonlinear LSI circuits. In former researches, CEPTA was implemented in SPICE-like simulator with the merits that the size of Jacobian matrix is not expanded during the calculation. While the inserted pseudo parts are converted to some certain equivalent circuits, the conventional...
By taking the advantages of both CPU and GPU as well as the shared DRAM and cache, the integrated CPU-GPU architecture has the potential to boost the performance for a variety of applications, including real-time applications as well. However, before being applied to the hard real-time and safety-critical applications, the time-predictability of the integrated CPU-GPU architecture needs to be studied...
An optical camera was recently employed by a subset of the authors as a sensing modality complementary to that of a Pyroelectric InfraRed (PIR) sensor, for carrying out intrusion detection and classification in an outdoor environment. The aim there was to develop a classification algorithm that mimicked the performance of the PIR sensor and which was complementary to the PIR in the sense that it could...
Grouping the vertex of the graph into sets of certain sizes such that minimum number of edges cross between the sets is called graph partitioning. This NP (Non-deterministic Polynomial time)-complete problem has important applications in computing, task scheduling, and parallel processing. We are implementing Kernighan-Lin, a local algorithm on both a Central Processing Unit (CPU) and a Graphics Processing...
The increasing interest in the integration of Mixed Criticality Systems (MCS) in Commercial-Off-The-Shelf (COTS) platforms leads to an increasing number of challenges. The possibility of sharing computing resources among applications with different time criticalities is a key goal for COTS systems, but still hard to achieve. Classical approaches in real-time systems are not feasible when platform...
Agricultural mechanization impacts on agricultural productivity and society development far-reaching. The emergence of VLSI (Very Large-Scale Integrated circuits) provides possibility for full intelligence and automation of agricultural products. The VLSI placement is now facing such double challenges: the integration scale and the circuit performance. From the experimental results, we find current...
This paper implements a Smoothed Particle Hydrodynamics simulation code and distributes it on a heterogeneous cluster. The theoretical analysis results show that treating GPU as equivalent peer of CPU rather than an assistant or a substitute is the most efficient way of using a CPU+GPU compute node. However, it raises complex challenges of heterogeneous cooperation. Our strategies of hybrid-level...
A central processing unit (CPU) and peripheral devices are discussed for which all data processing and data transfer is uniquely time tagged using a timestamp generated by the embedded processing system master clock. The Time Aware Processor (TAP) introduces time into the processor computing language to relate data to temporal events, including the processors own internal functions.
Embedded systems execute applications that exercise the hardware differently depending on the computation task, generating varying workloads with time. Energy minimization can be reached exploring the optimal CPU frequency for each workload. We propose an autonomous and online approach, capable of minimizing energy through adaptation to these workload variations even in an unknown environment. In...
Tone mapping operators map high dynamic range images so that they can be displayed with a high dynamic range appearance in a limited range medium. However, due to their large computational complexity, sequential implementation of these operators on CPU cannot achieve the frame rate needed for real-time video image processing. In this paper, we revisit these operators to simplify them so that we can...
Mobile Cloud Computing or Fog computing refer to offloading computationally intensive algorithms from a mobile device to a cloud or a intermediate cloud in order to save resources (time and energy) in the mobile device. In this paper, we look at alternative solution when the cloud or fog is not available. We modelled sensors using network of queues and use linear programming to make scheduling decisions...
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