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The integration of biosensors, microfluidics and CMOS instrumentation provides a compact lab-on-CMOS microsystem well suited for high throughput measurement. This paper describes a screen-printed planar metallization technique for lab-on-CMOS that overcomes challenges associated with traditional thin film metallization. Utilizing a chip-in-carrier packaging approach with an epoxy carrier, screen-printed...
We report the first demonstration of 3D ICs formed by the direct bonding of NFET and PFET prepared on separate layers. Hybrid bonding of Au/SiO2 at a low temperature of 200 °C allows direct connection of NFETs and PFETs after completion of the FET process without area penalty. We have demonstrated successful operation of a 3D CMOS inverter bonded through 3-μm-diameter Au electrodes and a ring oscillator...
A memory interface for a 3D System-on-a-Chip based on capacitive coupling is implemented in 90nm CMOS technology. The design choices have been driven by an innovative 3D extraction and simulation flow. The presented work exploits AC capacitive coupling for chip-to-chip communication running up to 250MHz. The interface transfers 128 bit words between stacked SRAMs in an ARM-based System-on-a-Chip (SoC)...
In this paper, we present our vision of a highly scalable arrayed biochemical sensor platform. This platform combines the advantages of refined and entrenched technologies like top-down integrated circuit fabrication and clinical assays with emerging technologies like three-dimensional stacking and label-free sensing. We demonstrate fabrication concepts and preliminary sensing results on ovarian cell...
We describe in this paper cells sensing and manipulation methods, as well as platforms based on Lab-on-chip devices. Among other contributions, new circuit and microfluidic techniques, and packaging methods are proposed for efficient cells manipulation and detection. The proposed devices include high-sensitivity sensing circuits (200 mV/fF), low-pressure liquid injection interfaces (<;;0.65 psi),...
This paper presents a review of the solutions proposed for chip-to-chip communication based on capacitive coupling. Circuit designs, assembly options and various different test cases are presented in this work. It is shown that this 3D technology is capable of transferring digital data between two dies at high-speed with low power consumption, and likewise analog signals without the need for any extra-wafer...
This paper presents the interconnection of single-walled carbon nanotube (SWNT) between electrodes on a CMOS integrated circuit chip made by TSMC 0.35 mum CMOS process. Alternating current dielectrophoretic force (AC-DEP) method is employed to micro-electrode that makes SWNTs deposited between electrodes. Using electroless nickel and immersion gold to cover the electrodes of Al could really increase...
For stability against the thermal budget of the CMOS BEOL process, we developed a new solid-electrolyte switch that uses a SiO2-Ta2O5 composite as the electrolyte. This switch has high thermal stability because thermal diffusion of Cu+ ions is suppressed in the composite. Moreover, its switching characteristics after thermal annealing are similar to those of a Ta2O5 switch without annealing. The switch...
A solid-electrolyte switch (ldquoNanoBridgerdquo) has been successfully embedded into a 0.13-mum-node dual-damascene Cu interconnect using a highly reliable bilayer solid-electrolyte (TaSiO/Ta2O5) and a thin oxidation barrier, resulting in an excellent ON/OFF ratio (> 109) at a low ON resistance of 50Omega. The newly developed bilayer solid-electrolyte has improved the thermal stability during...
This paper presents the interconnection of single - walled carbon nanotube (SWNT) between electrodes on a CMOS integrated circuit chip made by TSMC 0.35 ??m CMOS process. Using Electroless Nickel and Immersion Gold to cover the electrodes of Al could really increase the current more than 3 orders when SWNTs are connected between electrodes. One of the applications to this chip may be gas sensing,...
This paper presents the design, fabrication and functional testing of a fully implantable, flexible, Parylene-enabled neurostimulator that features single channel wireless stimulation capability. The system comprises a CMOS stimulator chip, a fold-and-bond RF coil, two platinum electrodes, and discrete capacitors. The MEMS components are fabricated with a Parylene-metal skin technology, and the system...
One of the most important promises of capacitive micromachined ultrasonic transducer (CMUT) technology is integration with electronics. This approach maximizes transducer sensitivity by minimizing parasitic capacitances and ultimately improves the signal to noise ratio. Additionally, due to physical size limitations required for catheter based imaging devices, optimization of area occurs when the...
While the potential of FinFETs for large-scale integration (LSI) was demonstrated before on relaxed device dimensions, in this paper we present performance data of aggressively scaled transistors, ring oscillators and SRAM cells. FinFET SRAMs are shown to have excellent VDD scalability (SNM=185 mV at 0.6 V), enabling sub-32 nm low-voltage design.
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential...
3D contactless technology based on capacitive coupling represents a promising solution for high-speed and low power signaling in vertically integrated chips. AC coupled interconnects do not suffer from mechanical stress, and the parasitic load is much reduced when compared to standard DC solutions, such as wire bonding and micro bumps. Communication system based on wireless interconnection scheme...
WSix metal resistors have been processed and characterized for CMOS technologies. It demonstrates good precision control and excellent quality factors for resistor applications. It can also be used for electrode of MIM capacitor simultaneously. This material and process are compatible for both Al and Cu back-end technologies and can be integrated as a module in these interconnects.
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