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A switched capacitor low-pass filter employing folded-cascode CMOS OP Amps with a dynamic switching bias circuit capable of processing video signals, which enables low power consumption, and operation in wide band-widths and low power supply voltages, is proposed. In this filter, charge transfer operations through two-phase clock pulses during the on-state period of the OP Amps and a non-charge transfer...
The new architectures of the high-speed operational amplifier (op-amp) based on the complementary folded cascodes (FCs), which form the intermediate stage of op-amp, are suggested. In the folded cascode the circuit techniques, excluding the traditional limitations of its output current, which recharges the balancing capacitor of op-amp, are provided. It increases the maximum slew rate of op-amp (SR)...
In this paper a DVCC based operational amplifier has been proposed. A pole has been introduced in transfer characteristic of DVCC by an integrated capacitor. The op amp is composed of an on chip DVCC, one integrated NMOS resistor, a capacitor and a CMOS voltage follower. The bandwidth of DVCC op amp can be adjusted by voltage tuning of the resistor. Conventional voltage mode operational amplifiers...
In this paper a CMOS operational amplifier is presented. A CMOS operational amplifier is presented here which is operating at 2V power supply and 1microamp input bias current at 0.8micrometer technology using nonconventional mode of MOS transistors and whose input is dependent on bias current. The unique behavior of the MOS transistors in sub threshold region allows a designer to work at low input...
A medium selectivity notch filter has been proposed. The active RC filter has only one operational amplifier and three resistors with one floating capacitor as passive components. Two floating resistors provide the positive feedback and one grounded resistor is used for independent tuning of Q factor. The amplifier pole frequency is used for designing the circuit and amplifier used is in both positive...
A low component sensitivity band-pass filter has been proposed. The filter has only one operational amplifier as active component and three resistors and one grounded capacitor as passive components. Two resistors provide the positive feedback and one resistor is used for independent tuning of Q factor. The capacitor is grounded which is an advantage in integrated technology. The circuit uses the...
An operational amplifier is described which uses separate loops to control the output voltage and the error voltage between its inputs. To a large extent this architecture combines the high-speed characteristics of “current feedback” amplifiers with the low input referred errors of precision architectures. The technique has been applied to produce an amplifier with precision characteristics comparable...
This paper proposes a design of an Operational Amplifier which uses an Adaptive biasing circuitry along with an auxiliary circuit to improve the Slew Rate. One auxiliary circuit have been added to the differential amplifier in order to improve its Slew Rate. The Power Dissipation of the circuit is well controlled by the auxiliary circuit as auxiliary circuit comes into play only during large transients...
This paper presents a high-speed CMOS OP Amp with a dynamic switching bias circuit capable of processing video signals of over 2 MHz with slight nonlinearity and low dissipated power. The OP Amp, capable of operating at 10 MHz dynamic switching rate, was designed and showed through simulations a dissipated power of 60 % of that in conventional continuous operation. A switched capacitor (SC) non-inverting...
This investigation presents a Domestic Indirect Feedback Compensation (DIFC) operational amplifier for systems with both low voltage and high voltage circuits. The DIFC operational amplifier is capable of converting a voltage signal from a low voltage circuit and amplifying it into a large voltage signal to drive high voltage load. Since the Metal-Insulator-Metal (MIM) capacitors are not designed...
In this paper, a practical analog implementation of capacitor charge balance controller is presented, which is capable of achieving the optimal response for dc-dc Buck converters without relying on the knowledge of the nominal passive component (output inductor and capacitor) value. This ready-for-integration analog controller applies the output voltage curve analysis for deriving the formulas to...
This paper presents a high-speed CMOS OP Amp with a dynamic switching bias circuit capable of processing video signals of over 2 MHz with decreased dissipated power. The OP Amp, capable of operating at 10 MHz dynamic switching rate, was designed and showed through simulations a dissipated power of 66 % of that in conventional continuous operation. This OP Amp was applied to a switched capacitor (SC)...
In this paper, an 8-bit (with 5-8bit mode selection), 440-MS/s pipelined Analog-to-Digital Converter (ADC) is presented. The ADC utilizes double-sampling in order to relax the operational amplifier (opamp) settling time requirements. Redundant sign digit (RSD) correction compensates offset errors of the comparators. The ADC is designed with a 0.13-μm CMOS process. In the 8-bit mode, measured effective...
In this paper, in order to reduce the power consumption of a cyclic ADC, for different cycles in digitizing an analog input sample, the values of the capacitors are scaled down. The power consumption of the operational amplifier is adaptively reduced as well. In order to demonstrate the effectiveness of the proposed technique, a 1.8V 12-bit 104kS/s ADC has been designed in a 0.18μm CMOS technology...
In this paper, we present new systematic method for the design of an analog PID controller, applied to the voltage-mode step-down (buck) DC/DC converters. The method relies on the specification of trajectory of the load transient response. Particularly, we are interested to design a controller limiting the voltage under/overshoot to its lowest possible value. It is shown that this lowest possible...
This paper proposes a design for a low power cascaded three stage Operational Amplifier, with frequency compensation by Nested Miller Compensation which could be made to operate at low voltage supplies. The multipath technique is used to increase the bandwidth by converting the system into a two stage amplifier at high frequencies. The Op-Amp is designed in 180 nm technology and operates at a 3 V...
This paper presents an enhanced differential voltage-to-Frequency (dVFC) suitable for telemetry applications. The realization method employs op-amps in conjunction with current conveyors and Set-Reset latch. The converter gain can be easily adjusted through the variation of a single resistor. Compared to the previous dVFC using only current conveyors and Set-Reset latch, the proposed converter offers...
A design procedure for an operational amplifier using indirect compensation is presented in this paper. Indirect compensation has inherent benefits in regards with power to speed trade-off. The technique has been seldom used in the past because a clear methodology for designing such an amplifier has not been provided. This paper develops the mathematical and analytical insight for designing an operational...
A 140 MS/s 10-bit pipelined analog-to-digital converter (ADC) using a folded sample-and-hold (S/H) stage and a 5-bit flash ADC is presented. To conquer the limited linear swing range results from an operational amplifier (OP-AMP). The proposed folded S/H stage allows the ADC to operate in the linear swing range of an OP-AMP. Only 17 comparators are required for a 5-bit flash ADC. Corresponding digital...
High performance analog-to-digital converters (ADC) are essential elements for the development of high performance image sensors. These circuits need a big number of ADCs to reach the required resolution at a specified speed. Moreover, nowadays power dissipation has become a key performance to be considered in analog designs, specially in those developed for portable devices. Design of such circuits...
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