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We use a lateral scaling methodology based on the bond-dispersion model to develop a generalized hot carrier degradation model for cascoded NMOS transistors in power management applications. Spatial profiling of interface traps (NIT) based on charge pumping measurements is used to identify damage regions responsible for VT and IDLIN degradation and to explain their time dependencies.
In this paper, the influence of the different length of the drift region and the field plate upon Hot-Carrier-Induced on-resistance (Ron) and threshold voltage (Vth) degradation in p-type lateral extended drain MOS (pLEDMOS) transistor with thick gate oxide has been investigated. It was concluded that increasing the length of drift region can reduce the Ron degradation but enhance the Vth degradation...
The degradations of p-type lateral extended drain MOS transistors with thick gate oxide are experimentally investigated. A novel structure is proposed with a low doped boundary of the drift region without additional process, which will be helpful in reducing the electric field, reducing the degradations of electrical parameters correspondingly. The effects have been detailed analyzed by the CP measurements...
The effect of partially undoped poly-silicon gate above the drift region in P-lateral double-diffused MOS (P-LDMOS) Transistors is investigated. Experiment results show that it can improve the off-state leakage current and reduce the on-state resistance. For hot carrier performance, this structure induces a higher initial current shift due to less vertical field. The long-term hot carrier degradation...
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
Anomalous hot-carrier induced on-resistance (Ron) and drive current degradations were observed in 18 V n-type Drain Extended MOS (DEMOS) devices with various n-type Drain Drift (NDD) implant dosages. Under the same stress conditions, the device with higher NDD dosage while showing a higher substrate current (Isub) results in lower Idsat and ON-resistance (Ron) degradations. Optimal conditions for...
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