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This paper gives a general overview on the methods to reduce interconnect resistance and capacitance in a standard CMOS technology followed by a discussion on the physical constraints that dictate the minimum achievable loading. A newly demonstrated method that uses carbon-nanotube to assist the formation of vertically aligned porous structure is studied. The method was shown to be able to reduce...
An electrical methodology to extract the complete set of interconnect process parameters is developed. A new structure comprising a combination of integrated meander resistor and a comb-capacitor sandwiched between bottom and top plates is proposed. Its electrical characterization provides all the necessary measurement data required for reliable and robust extraction of interconnect parameters, namely,...
A novel approach of copper CMP stop layer using uncured extreme low-K was demonstrated to improve the within-wafer Rs uniformity on Cu/extra low-k (XLK) interconnect. This CMP stop layer could be converted into a low dielectric constant film by removing porogen with post CMP treatment, hence its impact on overall's film capacitance is minimized.
A new air-gap interconnect scheme with no additional patterning step successfully resolves the issue of unlanded via, and provides good interconnect reliability and improved packaging margin. We demonstrate that the insertion of airgaps in a very low-k dielectric (k=2.5) reduces the RC value of a 0.07 um/0.07 um comb structure by ~14%, which is equivalent to an effective dielectric constant about...
The paper presents a logic interconnect device (LED) to model digital circuit with near back-end-of-line (BEOL) effect, and to measure system performance. It is driven by a product inverter-based logic circuit, and it is loaded with near-BEOL wiring. The LID ring oscillator is measured and analyzed in 65 nm SOI CMOS. The methodology offers in-situ characterization of near-BEOL interconnect parasitics,...
The fabrication and characterization of low loss parallel plate and microstrip lines with an air dielectric layer is described. The lines are characterized by capacitance and loss tangent at 10 kHz and 100 kHz and by S-parameters up to 10 GHz. The inclusion of the air-gap significantly reduced the loss tangent and lowered the dielectric constant to between 1.5 and 1.8. More complicated transmission...
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