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This paper introduces a practical methodology to improve power integrity performance of the chip-package-PCB systems for smart TVs. For power integrity analysis, a chip, package and PCB are modeled as lumped element circuits for simplicity. Case studies are presented to optimize MLCC placement using chip-package-PCB co-simulation under fixed SoC design. In case studies, CPU power net of an application...
With the growing concerns about electromagnetic compatibility of integrated circuits, the need for accurate prediction tools and models to reduce risks of non-compliance becomes critical for circuit designers. On-chip characterization of noise becomes necessary for model validation and design optimization to reduce redesign costs and time-to-market for IC manufacturers. This paper presents an on-chip...
A physical unclonable function (PUF) is an embedded integrated circuit (IC) structure that is designed to leverage naturally occurring variations to produce a random bitstring. In this paper, we evaluate a PUF which leverages resistance variations which occur in transmission gates (TGs) of ICs. We also investigate a novel on-chip technique for converting the voltage drops produced by TGs into a digital...
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