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This paper presents a new topology for wide band MMIC LNA. The proposed new architecture is based on a modification of the commonly used cascode cell. A 2-18 GHz MMIC LNA was designed and manufactured with the commercial PH15 UMS process. To our knowledge, the results obtained represent the new sate of art performance: the packaged die exhibits a 2.1 dB noise figure associated to a 25 dB gain and...
This paper discusses the design of a 60 GHz low noise amplifier (LNA) using a standard low power SOI CMOS process from ST Microelectronics. First, we outline the technology as well as the mm-wave design challenges. Using recent work on coplanar waveguide (CPW) modeling, we describe how it's possible to use parametric, 3D electromagnetic simulation to complete or replace analytical models of on-chip...
This paper presents two approaches to improve the performance of RF low noise amplifiers (LNAs). One approach is for noise enhancement and the other is for improving flatness of very wide range LNA. The techniques described here are based mainly on making some enhancement on capacitive cross-coupled LNA technique. LNAs have been designed in 130 nm CMOS process with 1.2 V power supply. Enhanced noise...
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