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We have systematically investigated Ge interface passivation methods, and the highest electron (1920 cm2/Vs) and hole mobility (725 cm2/Vs) have been demonstrated by dramatic reduction of Dit through the collaboration of self-passivation and valency passivation. In Si passivation, it is found that Si contributes to the upper half (worse) and lower one (better) in the bandgap differently. This study...
Continuously down-scaling EOT and improving mobility are required for CMOS device. Small 0.6~1 nm EOT and low Vt of ~0.15 V are achieved in CMOS by using higher κ gate dielectric and novel process. The ultimate EOT scaling is limited by the inserted ultra-thin SiON interfacial layer in high-κ/Si to reduce the mobility degradation. Further mobility improvement is obtained by using Ge channel MOSFET...
Hole mobility in fully-depleted GeOI pMOSFETs is determined and analyzed using for the first time the geometric magnetoresistance technique. The temperature dependent measurements clarify the scattering mechanisms. A significant difference between effective mobility and magnetoresistance mobility is found. Unlike the SOI nMOSFET, this ratio (rMR ≃ 1.8) is rather independent on the temperature and...
Compressively-strained germanium-on-insulator (c-GeOI) substrates have been fabricated using the Smart Cuttrade technology. The technique is based on the optimized epitaxial growth process that reduces the threading dislocation density (TDD) in the strained Ge layer to the levels of 8middot105 /cm2. Pseudo-MOSFET characterization showed 67% hole mobility enhancement with respect to conventional GeOI...
Using the non-local empirical pseudopotential method (bandstructure), full-band Monte-Carlo simulations (transport), self-consistent Poisson-Schrodinger (electrostatics) and detailed band-to-band-tunneling (BTBT) (including bandstructure and quantum effects) simulations, the effect of surface/channel orientation, uniaxial- and biaxial-strain, band-structure, mobility, and high-field transport on the...
Systematic studies on Schottky S/D metal-germanide for both Ge PMOSFET (Ni & Pt) and NMOSFET (Er) application are reported. Thermal emission model-based barrier height measurement shows that hole barrier heights for PtGe2/n-Ge (100) and NiGe/n-Ge (100) are extracted as low as Phih~0 eV and ~0.06 eV, respectively, and electron barrier height, Phie~0.12 eV for Er3Ge4/p-Ge (100) contact. Ni- &...
This paper presents results on conventional, deep sub-micron short-channel Ge p-and nFET devices with a HiK/MG gate stack and NiGe source/drain regions. It is shown that the mobility enhancement observed in long channel Ge pFETs as compared to Si pFETs, can indeed result in deep sub-micron Ge devices with a higher drive
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